SPRUJ42 User guide | 德州仪器 TI.com.cn

SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1

PRODUCTION DATA

3.6.2.12 ECAP_ECCLR Register

6.2.12.1 ECAP_ECCLR Register (Offset = 30h) [reset = 0h]

Capture Interrupt Clear Register.

Table 3-484 Instance Table

Instance Name	Physical Address
ECAP0	5024 0030h
ECAP1	5024 1030h
ECAP2	5024 2030h
ECAP3	5024 3030h
ECAP4	5024 4030h
ECAP5	5024 5030h
ECAP6	5024 6030h
ECAP7	5024 7030h
ECAP8	5024 8030h
ECAP9	5024 9030h

Figure 3-234 ECAP_ECCLR Name Register

15	14	13	12	11	10	9	8
RESERVED_1			MUNIT_2_ERROR_EVT2	MUNIT_2_ERROR_EVT1	MUNIT_1_ERROR_EVT2	MUNIT_1_ERROR_EVT1	HRERROR
R			R/W1TC	R/W1TC	R/W1TC	R/W1TC	R/W1TC
0h			0h	0h	0h	0h	0h
7	6	5	4	3	2	1	0
CTR_CMP	CTR_PRD	CTROVF	CEVT4	CEVT3	CEVT2	CEVT1	INT
R/W1TC	R/W1TC	R/W1TC	R/W1TC	R/W1TC	R/W1TC	R/W1TC	R/W1TC
0h	0h	0h	0h	0h	0h	0h	0h

Table 3-485 ECAP_ECCLR Register Field Descriptions

Bit	Field	Type	Reset	Description
15:13	RESERVED_1	R	0h	Reserved
12	MUNIT_2_ERROR_EVT2	R/W1TC	0h	Writing '1' clears MUNIT_2_ERROR_EVT2 interrupt flag
11	MUNIT_2_ERROR_EVT1	R/W1TC	0h	Writing '1' clears MUNIT_2_ERROR_EVT1 interrupt flag
10	MUNIT_1_ERROR_EVT2	R/W1TC	0h	Writing '1' clears MUNIT_1_ERROR_EVT2 interrupt flag
9	MUNIT_1_ERROR_EVT1	R/W1TC	0h	Writing '1' clears MUNIT_1_ERROR_EVT1 interrupt flag
8	HRERROR	R/W1TC	0h	High resolution error status Clear 1 Writing a 1 clears the HRERROR flag. 0 Writing a 0 has no effect. Always reads back a 0
7	CTR_CMP	R/W1TC	0h	Counter Equal Compare Status Clear 1 Writing a 1 clears the CTR=CMP flag. 0 Writing a 0 has no effect. Always reads back a 0
6	CTR_PRD	R/W1TC	0h	Counter Equal Period Status Clear 1 Writing a 1 clears the CTR=PRD flag. 0 Writing a 0 has no effect. Always reads back a 0
5	CTROVF	R/W1TC	0h	Counter Overflow Status Clear 1 Writing a 1 clears the CTROVF flag. 0 Writing a 0 has no effect. Always reads back a 0
4	CEVT4	R/W1TC	0h	Capture Event 4 Status Clear 1 Writing a 1 clears the CEVT4 flag. 0 Writing a 0 has no effect. Always reads back a 0
3	CEVT3	R/W1TC	0h	Capture Event 3 Status Clear 1 Writing a 1 clears the CEVT3 flag. 0 Writing a 0 has no effect. Always reads back a 0
2	CEVT2	R/W1TC	0h	Capture Event 2 Status Clear 1 Writing a 1 clears the CEVT2 flag. 0 Writing a 0 has no effect. Always reads back a 0
1	CEVT1	R/W1TC	0h	Capture Event 1 Status Clear 1 Writing a 1 clears the CEVT1 flag. 0 Writing a 0 has no effect. Always reads back a 0
0	INT	R/W1TC	0h	ECAP Global Interrupt Status Clear 1 Writing a 1 clears the INT flag and enable further interrupts to be generated if any of the event flags are set to 1 0 Writing a 0 has no effect. Always reads back a 0