SPRUJ42 User guide | 德州仪器 TI.com.cn

SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1

PRODUCTION DATA

5.22.2.25 RTI_RTISETINT Register

22.2.25.1 RTI_RTISETINT Register (Offset = 80h) [reset = 0h]

Set Interrupt Enable sets interrupt enable bits int RTIINTCTRL without having to do a read-modify-write operation.

Table 5-2230 Instance Table

Instance Name	Physical Address
RTI0	5218 0080h
RTI1	5218 1080h
RTI2	5218 2080h
RTI3	5218 3080h

Figure 5-1097 RTI_RTISETINT Name Register

31	30	29	28	27	26	25	24
RESERVED11
R/W
0h
23	22	21	20	19	18	17	16
RESERVED11					SETOVL1INT	SETOVL0INT	SETTBINT
R/W					R/W	R/W	R/W
0h					0h	0h	0h
15	14	13	12	11	10	9	8
RESERVED10				SETDMA3	SETDMA2	SETDMA1	SETDMA0
R/W				R/W	R/W	R/W	R/W
0h				0h	0h	0h	0h
7	6	5	4	3	2	1	0
RESERVED9				SETINT3	SETINT2	SETINT1	SETINT0
R/W				R/W	R/W	R/W	R/W
0h				0h	0h	0h	0h

Table 5-2231 RTI_RTISETINT Register Field Descriptions

Bit	Field	Type	Reset	Description
31:19	RESERVED11	R/W	0h	Reserved. Reads return 0 and writes have no effect
18	SETOVL1INT	R/W	0h	SETOVL1INT: Set Free Running Counter 1 Overflow Interrupt. User and privilege mode [read]: 0 = interrupt is disabled 1 = interrupt is enabled Privilege mode [write]: 0 = leaves the corresponding bit unchanged 1 = enable interrupt
17	SETOVL0INT	R/W	0h	SETOVL0INT: Set Free Running Counter 0 Overflow Interrupt. User and privilege mode [read]: 0 = interrupt is disabled 1 = interrupt is enabled Privilege mode [write]: 0 = leaves the corresponding bit unchanged 1 = enable interrupt
16	SETTBINT	R/W	0h	SETTBINT: Set Timebase Interrupt. User and privilege mode [read]: 0 = interrupt is disabled 1 = interrupt is enabled Privilege mode [write]: 0 = leaves the corresponding bit unchanged 1 = enable interrupt
15:12	RESERVED10	R/W	0h	Reserved. Reads return 0 and writes have no effect
11	SETDMA3	R/W	0h	SETDMA3: Set Compare DMA Request 3. User and privilege mode [read]: 0 = DMA request is disabled 1 = DMA request is enabled Privilege mode [write]: 0 = leaves the corresponding bit unchanged 1 = enable DMA request
10	SETDMA2	R/W	0h	SETDMA2: Set Compare DMA Request 2. User and privilege mode [read]: 0 = DMA request is disabled 1 = DMA request is enabled Privilege mode [write]: 0 = leaves the corresponding bit unchanged 1 = enable DMA request
9	SETDMA1	R/W	0h	SETDMA1: Set Compare DMA Request 1. User and privilege mode [read]: 0 = DMA request is disabled 1 = DMA request is enabled Privilege mode [write]: 0 = leaves the corresponding bit unchanged 1 = enable DMA request
8	SETDMA0	R/W	0h	SETDMA0: Set Compare DMA Request 0. User and privilege mode [read]: 0 = DMA request is disabled 1 = DMA request is enabled Privilege mode [write]: 0 = leaves the corresponding bit unchanged 1 = enable DMA request
7:4	RESERVED9	R/W	0h	Reserved. Reads return 0 and writes have no effect
3	SETINT3	R/W	0h	SETINT3: Set Compare Interrupt 3. User and privilege mode [read]: 0 = interrupt is disabled 1 = interrupt is enabled Privilege mode [write]: 0 = leaves the corresponding bit unchanged
2	SETINT2	R/W	0h	SETINT2: Set Compare Interrupt 2. User and privilege mode [read]: 0 = interrupt is disabled 1 = interrupt is enabled Privilege mode [write]: 0 = leaves the corresponding bit unchanged 1 = enable interrupt
1	SETINT1	R/W	0h	SETINT1: Set Compare Interrupt 1. User and privilege mode [read]: 0 = interrupt is disabled 1 = interrupt is enabled Privilege mode [write]: 0 = leaves the corresponding bit unchanged 1 = enable interrupt
0	SETINT0	R/W	0h	SETINT0: Set Compare Interrupt 0. User and privilege mode [read]: 0 = interrupt is disabled 1 = interrupt is enabled Privilege mode [write]: 0 = leaves the corresponding bit unchanged 1 = enable interrupt