SPRUJ42 User guide | 德州仪器 TI.com.cn

SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1

PRODUCTION DATA

5.15.2.10 MMC_BLK Register

15.2.10.1 MMC_BLK Register (Offset = 204h) [reset = 0h]

Transfer Length Configuration Register

MMCHS_BLK[BLEN] is the block size register.
MMCHS_BLK[NBLK] is the block count register.

This register shall be used for any card.

Return to Summary Table

Table 5-1782 Instance Table

Instance Name	Physical Address
MMCSD0	4830 0204h

Figure 5-879 MMC_BLK Name Register

31	30	29	28	27	26	25	24
NBLK
R/W
0h
23	22	21	20	19	18	17	16
NBLK
R/W
0h
15	14	13	12	11	10	9	8
RESERVED				BLEN
R				R/W
0h				0h
7	6	5	4	3	2	1	0
BLEN
R/W
0h

Table 5-1783 MMC_BLK Register Field Descriptions

Bit	Field	Type	Reset	Description
31:16	NBLK	R/W	0h	Blocks count for current transfer This register is enabled when Block count Enable [MMCSD_CMD[BCE]] is set to 1 and is valid only for multiple block transfers. Setting the block count to 0 results no data blocks being transferred. Note: The host controller decrements the block count after each block transfer and stops when the count reaches zero. This register can be accessed only if no transaction is executing [i.e, after a transaction has stopped]. Read operations during transfers may return an invalid value and write operation will be ignored. In suspend context, the number of blocks yet to be transferred can be determined by Reading this register. When restoring transfer context prior to issuing a Resume command, The local host shall restore the previously saved block count. 65535 65535 blocks 2 2 blocks 1 1 block 0 Stop count
15:12	RESERVED	R	0h
11:0	BLEN	R/W	0h	Transfer Block Size. This register specifies the block size for block data transfers. Read operations during transfers may return an invalid value, and write operations are ignored. When a CMD12 command is issued to stop the transfer, a read of the BLEN field after transfer completion [MMCSD_STAT[TC] set to 1] will not return the true byte number of data length while the stop occurs but the value written in this register before transfer is launched. 2048 2048 bytes block length 2047 2047 bytes block length 512 512 bytes block length 511 511 bytes block length 3 3 bytes block length 2 2 bytes block length 1 1 byte block length 0 No data transfer