SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1
PRODUCTION DATA
The LIN_GLB_INT_FLG register contains the current status of the INT0 and INT1 flags.
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| Instance Name | Physical Address |
|---|---|
| LIN0 | 5240 00E4h |
| LIN1 | 5240 10E4h |
| LIN2 | 5240 20E4h |
| LIN3 | 5240 30E4h |
| LIN4 | 5240 40E4h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED_1 | |||||||
| R | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED_1 | |||||||
| R | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED_1 | |||||||
| R | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED_1 | INT1_FLG | INT0_FLG | |||||
| R | R | R | |||||
| 0h | 0h | 0h | |||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:2 | RESERVED_1 | R | 0h | Reserved |
| 1 | INT1_FLG | R | 0h | Global Interrupt Flag for LIN INT1. This bit indicates if an interrupt was generated to the PIE due to an enabled interrupt on the INT1 interrupt line. Refer to the LIN Interrupt Status Register for the condition that generated the interrupt. This bit can be cleared by Writing a 1 to the corresponding bit in the LIN_GLB_INT_CLR register. 1 An interrupt was generated due to an
enabled interrupt on the INT1 interrupt
line.
0 No interrupt is active on the INT1 line. |
| 0 | INT0_FLG | R | 0h | Global Interrupt Flag for LIN INT0. This bit indicates if an interrupt was generated to the PIE due to an enabled interrupt on the INT0 interrupt line. Refer to the LIN Interrupt Status Register for the condition that generated the interrupt. This bit can be cleared by Writing a 1 to the corresponding bit in the LIN_GLB_INT_CLR register. 1 An interrupt was generated due to an
enabled interrupt on the INT0 interrupt
line.
0 No interrupt is active on the INT0 line. |