SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1
PRODUCTION DATA
The SCIGCR0 register defines the module reset.
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| Instance Name | Physical Address |
|---|---|
| LIN0 | 5240 0000h |
| LIN1 | 5240 1000h |
| LIN2 | 5240 2000h |
| LIN3 | 5240 3000h |
| LIN4 | 5240 4000h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED_2 | |||||||
| R | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED_2 | |||||||
| R | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED_1 | |||||||
| R | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED_1 | RESET | ||||||
| R | R/W | ||||||
| 0h | 0h | ||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:16 | RESERVED_2 | R | 0h | Reserved |
| 15:1 | RESERVED_1 | R | 0h | Reserved |
| 0 | RESET | R/W | 0h | This bit resets the SCI/LIN module. This bit is effective in LIN or SCI-compatible mode.. This bit affects the reset state of the SCI/LIN module. 1 SCI/LIN module is out of reset. 0 SCI/LIN module is in held in reset. |