SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1
PRODUCTION DATA
Transmit event and error flag force register.
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| Instance Name | Physical Address |
|---|---|
| FSI_TX0 | 5028 002Eh |
| FSI_TX1 | 5028 102Eh |
| FSI_TX2 | 502A 002Eh |
| FSI_TX3 | 502A 102Eh |
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED_1 | |||||||
| R | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED_1 | PING_TRIGGERED | BUF_OVERRUN | BUF_UNDERRUN | FRAME_DONE | |||
| R | W | W | W | W | |||
| 0h | 0h | 0h | 0h | 0h | |||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 15:4 | RESERVED_1 | R | 0h | Reserved |
| 3 | PING_TRIGGERED | W | 0h | Ping Frame Triggered Flag Force bit This bit will cause the corresponding bit in the TX_EVT_STS register to get set. The purpose of this register is to allow software to simulate the effect of the event and test the associated software/ISR. 0h[W] = Writing a 0 to this bit will have no effect. 1h[W] = Force the corresponding flag bit in the TX_EVT_STS Register. |
| 2 | BUF_OVERRUN | W | 0h | Buffer Overrun Flag Force bit This bit will cause the corresponding bit in the TX_EVT_STS register to get set. The purpose of this register is to allow software to simulate the effect of the event and test the associated software/ISR. 0h[R/W] = Writing a 0 to this bit will have no effect. 1h[R/W] = Force the corresponding flag bit in the TX_EVT_STS Register. |
| 1 | BUF_UNDERRUN | W | 0h | Buffer Underrun Flag Force bit This bit will cause the corresponding bit in the TX_EVT_STS register to get set. The purpose of this register is to allow software to simulate the effect of the event and test the associated software/ISR. 0h[W] = Writing a 0 to this bit will have no effect. 1h[W] = Force the corresponding flag bit in the TX_EVT_STS Register. |
| 0 | FRAME_DONE | W | 0h | Frame Done Flag Force bit This bit will cause the corresponding bit in the TX_EVT_STS register to get set. The purpose of this register is to allow software to simulate the effect of the event and test the associated software/ISR. 0h[W] = Writing a 0 to this bit will have no effect. 1h[W] = Force the corresponding flag bit in the TX_EVT_STS Register. |