SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1
PRODUCTION DATA
Transmit buffer pointer control load register.
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| Instance Name | Physical Address |
|---|---|
| FSI_TX0 | 5028 0010h |
| FSI_TX1 | 5028 1010h |
| FSI_TX2 | 502A 0010h |
| FSI_TX3 | 502A 1010h |
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED_1 | |||||||
| R | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED_1 | BUF_PTR_LOAD | ||||||
| R | R/W | ||||||
| 0h | 0h | ||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 15:4 | RESERVED_1 | R | 0h | Reserved |
| 3:0 | BUF_PTR_LOAD | R/W | 0h | Buffer Pointer Load bits These bits are used to force the transmit buffer pointer to a desired index within the transmit buffer. The next transmission will begin picking data from this index and increment appropriately. This value will be reflected in TX_BUF_PTR_STS only after a minimum 3 SYSCLK cycles + 3 TXCLK cycles. This value should not be written while there is an active transmission as it may corrupt the ongoing frame or other undefined behavior. |