CODELOADER
CodeLoader 器件寄存器编程
CODELOADER
概述
The CodeLoader 4 software is used to program the LMX PLLs and LMK timing devices through either the USB or line print terminal (LPT) port of a computer. This software also provides information on how to program the device by showing the bits that are actually sent.
Which software do I use?
Product | Loop filter & device configuration + simulation | Device register programming |
LMX24xx PLL family | EasyPLL | CodeLoader* |
LMX25xx PLL+VCO family | ||
LMK jitter cleaners and distributors |
*For new designs, use the Clocks and Synthesizers (TICS) Pro Software tool.
下载
软件编程工具
您可能需要的其他资源
支持软件
TICSPRO-SW — TICS Pro GUI and Live Programming Tool for Clocking Devices
支持的产品和硬件
产品
时钟发生器
射频 PLL 与合成器
时钟缓冲器
振荡器
时钟抖动清除器
时钟网络同步器
硬件开发
评估板
TICSPRO-SW — TICS Pro GUI and Live Programming Tool for Clocking Devices
TICS Pro 1.7.7.6 installer binary for Windows operating system
产品
时钟发生器
射频 PLL 与合成器
时钟缓冲器
振荡器
时钟抖动清除器
时钟网络同步器
硬件开发
评估板
文档
TICS Pro 1.7.7.6 Release Notes
TICS Pro 1.7.7.6 Software Manifest
发布信息
Added Features
LMK5Bxxyyy, LMK5Cxxyyy
- Warnings and errors improved, particularly corrective suggestions
- REFx_FREQ=0 automatically disables DPLL reference input selection for that input
- Input validation enabled and disabled by start page settings, including 1PPS
- APLL reference selection moved to Step 5, just before clock output definition
- Quick-set multiple outputs to the same settings on frequency planner
- BAW VCO allows some ppm deviation
- Force SYSREF option on OUT0/1
- Expose DPLLx_LCK_TIMER field
- Match LMK05318B EEPROM page design
- .EPR export option
- EEPROM SRAM programming generation support
- For complete changelist, see release notes
LMK3H0102
- Configuration search tool
- Wizard: voltage selection option
Bug Fixes
- LMK04832-SP, LMK04832-SEP, LMK04714-Q1, LMK04368-EP - PD_FIN0 corrected to FIN0_PD
- LMK3H0102 - Several wizard bugfixes
Known Issues
- LMK5C33216 - When cascading from VCO3 to DPLL input, the divide value must manually be entered into DPLLx_REF5_RDIV as ( VCO3 output frequency / DPLLx TDC frequency )
- LMK05318 - In some cases, it is necessary to press "Calculate Frequency Plan" twice for correct VCO2 frequency. This issue is resolved in LMK05318B GUI.
- Burst mode page looping requires long delays to halt, and halting may crash the GUI. If possible, do not loop in burst mode.
- User Controls page can sometimes become desynchronized from Raw Registers and other pages. Refer to Raw Registers or other pages for correct values. Saving/Loading and Import/Export of register data is unaffected, and register data will still be written to and read from connected devices correctly.
设计工具
PLLATINUMSIM-SW — PLLatinum Sim Tool
支持的产品和硬件
产品
射频 PLL 与合成器
时钟缓冲器
时钟发生器
IQ 解调器
时钟抖动清除器
时钟网络同步器
硬件开发
评估板
PLLATINUMSIM-SW — PLLatinum Sim Tool
产品
射频 PLL 与合成器
时钟缓冲器
时钟发生器
IQ 解调器
时钟抖动清除器
时钟网络同步器
硬件开发
评估板
发布信息
Bug fixes
最新动态
- Fixed Kvco calculation bug introduced in 1.6.6
- Added warning for loop bandwidth being restricted due to min high order capacitance.
技术文档
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类型 | 标题 | 下载最新的英语版本 | 日期 | |||
---|---|---|---|---|---|---|
* | 用户指南 | CodeLoader 4 Operating Instructions User's Guide (Rev. A) | 2014年 7月 21日 | |||
技术文章 | A survival guide to scaling your PLL loop filter design | PDF | HTML | 2016年 11月 22日 | |||
技术文章 | What to do when your PLL does not lock | PDF | HTML | 2016年 7月 12日 |