LMX2487
- Quadruple Modulus Prescaler for Lower Divides
- RF PLL: 16/17/20/21 or 32/33/36/37
- IF PLL: 8/9 or 16/17
- Advanced Delta Sigma Fractional Compensation
- 12-Bit or 22-Bit Selectable Fractional Modulus
- Up to 4th Order Programmable Delta-Sigma
Modulator
- Improved Lock Times
- Fastlock / Cycle Slip Reduction With Single-
Word Write to Change Frequencies - Integrated Time-Out Counter
- Fastlock / Cycle Slip Reduction With Single-
- Wide Operating Range
- LMX2487 RF PLL: 1.0 GHz to 6.0 GHz
- Useful Features
- Digital Lock Detect Output
- Hardware and Software Power-Down Control
- On-Chip Input Frequency Doubler
- RF Phase Comparison Detector Up to 50 MHz
- 2.5-V to 3.6-V Operation With ICC = 8.5 mA
The LMX2487 device is a low power, high performance delta-sigma fractional-N PLL with an auxiliary integer-N PLL. It is fabricated using TI’s advanced process.
With delta-sigma architecture, fractional spurs at lower offset frequencies are pushed to higher frequencies outside the loop bandwidth. The ability to push close in spur and phase noise energy to higher frequencies is a direct function of the modulator order. Unlike analog compensation, the digital feedback technique used in the LMX2487 is highly resistant to changes in temperature and variations in wafer processing. The LMX2487 delta-sigma modulator is programmable up to fourth order, which allows the designer to select the optimum modulator order to fit the phase noise, spur, and lock time requirements of the system.
Serial data for programming the LMX2487 is transferred through a three-line, high-speed (20-MHz) MICROWIRE interface. The LMX2487 offers fine frequency resolution, low spurs, fast programming speed, and a single-word write to change the frequency. This makes it ideal for direct digital modulation applications, where the N-counter is directly modulated with information. The LMX2487 is available in a 24-lead 4.0 × 4.0 × 0.8 mm WQFN package.
技术文档
类型 | 项目标题 | 下载最新的英语版本 | 日期 | |||
---|---|---|---|---|---|---|
* | 数据表 | LMX2487 1-GHz to 6-GHz High Performance Delta-Sigma Low-Power Dual PLLatinum Frequency Synthesizers With 3-GHz Integer PLL 数据表 (Rev. C) | PDF | HTML | 13 Jan 2016 |
设计和开发
如需其他信息或资源,请查看下方列表,点击标题即可进入详情页面。
CLOCKDESIGNTOOL — 时钟设计工具 - 环路滤波器和器件配置 + 仿真
PLLATINUMSIM-SW — PLLatinum™ 仿真工具
TICSPRO-SW — 德州仪器 (TI) 时钟和合成器 (TICS) 专业软件
CODELOADER — CodeLoader 器件寄存器编程
Which software do I use?
Product | (...) |
CLOCK-TREE-ARCHITECT 时钟树架构编程软件
封装 | 引脚数 | 下载 |
---|---|---|
WQFN (RTW) | 24 | 了解详情 |
订购和质量
- RoHS
- REACH
- 器件标识
- 引脚镀层/焊球材料
- MSL 等级/回流焊峰值温度
- MTBF/时基故障估算
- 材料成分
- 认证摘要
- 持续可靠性监测
推荐产品可能包含与 TI 此产品相关的参数、评估模块或参考设计。