具有双级联 PLL 和集成 2.2 GHz VCO 的时钟抖动消除器




The LMK04800 family is the industry's highest performance clock conditioner with superior clock jitter cleaning, generation, and distribution with advanced features to meet next generation system requirements. The dual loop PLLatinum? architecture enables 111 fs rms jitter (12 kHz to 20 MHz) using a low noise VCXO module or sub-200 fs rms jitter (12 kHz to 20 MHz) using a low cost external crystal and varactor diode.

The dual loop architecture consists of two high-performance phase-locked loops (PLL), a low-noise crystal oscillator circuit, and a high-performance voltage controlled oscillator (VCO). The first PLL (PLL1) provides a low-noise jitter cleaner function while the second PLL (PLL2) performs the clock generation. PLL1 can be configured to either work with an external VCXO module or the integrated crystal oscillator with an external tunable crystal and varactor diode. When used with a very narrow loop bandwidth, PLL1 uses the superior close in phase noise (offsets below 50 kHz) of the VCXO module or the tunable crystal to clean the input clock. The output of PLL1 is used as the clean input reference to PLL2 where it locks the integrated VCO. The loop bandwidth of PLL2 can be optimized to clean the far-out phase noise (offsets above 50 kHz) where the integrated VCO outperforms the VCXO module or tunable crystal used in PLL1.

  • Multi-mode: Dual PLL, single PLL, and clock distribution
  • Dual Loop PLLatinum PLL Architecture
    - PLL1
    > Holdover mode when input clocks are lost
    + Automatic or manual triggering/recovery
    - PLL2
    > Integrated Low-Noise VCO
  • 2 redundant input clocks with LOS
    - Automatic and manual switch-over modes
  • 50% duty cycle output divides, 1 to 1045 (even and odd)
  • LVPECL, LVDS, or LVCMOS programmable outputs
  • Precision digital delay, fixed or dynamically adjustable
  • 25 ps step analog delay control.
  • 14 differential outputs. Up to 26 single ended.
    - Up to 6 VCXO/Crystal buffered outputs
  • 0-delay mode


  • Evaluation board
  • LPT programming cable (USB interface available separately)
  • Quick start sheet
LMK04805 具有双级联 PLL 和集成式 2.2GHz VCO 的低噪声时钟抖动消除器



LMK04805BEVAL/NOPB — Clock Jitter Cleaner With Dual Cascaded PLLs and Integrated 2.2 GHz VCO

In stock / Out of stock
TI.com 上无现货
应遵守 TI 的评估模块标准条款与条件.


= TI 精选文档
查看所有 4
类型 标题 下载最新的英文版本 日期
* EVM 用户指南 LMK0480x Evaluation Board Instructions (Rev. B) 2014年 8月 4日
证书 LMK04805BEVAL/NOPB EU Declaration of Conformity (DoC) 2019年 1月 2日
EVM 用户指南 LMK048xx Evaluation Board User's Guide 2013年 11月 26日
EVM 用户指南 Clock Jitter Cleaner w/Dual Cascaded PLLs & Integrated 1.9 GHz VCO User Guide 2012年 1月 27日



CLOCKDESIGNTOOL 时钟设计工具 - 环路滤波器和器件配置 + 仿真
CODELOADER CodeLoader 器件寄存器编程


可获得 TI E2E™ 论坛的工程师技术支持

查看所有论坛主题 查看英文版所有论坛主题

所有内容均由 TI 和社区网友按“原样”提供,并不构成 TI 规范。参阅使用条款

如果您对质量、包装或订购 TI 产品有疑问,请参阅 TI 支持