LMK61E08
- Ultra-Low Noise, High Performance
- Jitter: 90-fs RMS Typical fOUT > 100 MHz on LMK61E08
- PSRR: –70 dBc, Robust Supply Noise Immunity on LMK61E08
- Flexible Output Format on LMK61E08
- LVPECL up to 1 GHz
- LVDS up to 900 MHz
- HCSL up to 400 MHz
- Total Frequency Tolerance of ±25 ppm
- System Level Features
- Glitch-Less Frequency Margining: Up to ±1000 ppm From Nominal
- Internal EEPROM: User Configurable Start-Up Settings
- Other Features
- Device Control: Fast Mode I2C up to 1000 kHz
- 3.3-V Operating Voltage
- Industrial Temperature Range (–40ºC to +85ºC)
- 7-mm × 5-mm 6-Pin Package
- Default Frequency:
- 70.656 MHz
The LMK61E08 family of ultra-low jitter PLLatinum™ programmable oscillators uses fractional-N frequency synthesizers with integrated VCOs to generate commonly used reference clocks. The output on LMK61E08 can be configured as LVPECL, LVDS, or HCSL. The device features self-start-up from on-chip EEPROM to generate a factory-programmed default output frequency, or the device registers and EEPROM settings are fully programmable in-system through an I2C serial interface. The device provides fine and coarse frequency margining control through an I2C serial interface, making it a digitally-controlled oscillator (DCXO).
The PLL feedback divider can be updated to adjust the output frequency without spikes or glitches in steps of <1ppb using a PFD of 12.5 MHz (R divider=4, doubler disabled) for compatibility with xDSL requirements, or in steps of <5.2 ppb using a PFD of 100 MHz (R divider=1, doubler enabled) for compatibility with broadcast video requirements. The frequency margining features also facilitate system design verification tests (DVT), such as standards compliance and system timing margin testing.
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技术文档
类型 | 标题 | 下载最新的英语版本 | 日期 | |||
---|---|---|---|---|---|---|
* | 数据表 | LMK61E08 Ultra-Low Jitter Programmable Oscillator With Internal EEPROM 数据表 | PDF | HTML | 2020年 6月 24日 |
设计和开发
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LMK61E2EVM — LMK61E2EVM 超低抖动可编程振荡器评估模块
LMK61E2EVM 评估模块提供了一个完整平台来评估具有集成式 EEPROM 和频率容限功能的德州仪器 (TI) LMK61E2 超低抖动可编程差动振荡器的 90fs RMS 抖动性能和可配置性。
LMK61E2EVM 可以用作抖动关键型应用的高性能时钟源,且可以轻松定制为用户期望的任何频率和输出格式。借助板载的 USB 转 I2C 接口,可通过软件图形用户界面 (GUI) 进行器件配置,且无需提供外部输入或电源即可运行器件。边缘发射 SMA 端口可用于访问 LMK61E2 的差分时钟输出,从而使用市售同轴电缆、适配器或平衡-非平衡变压器(未附带)连接到测试设备或参考板。
CLOCK-TREE-ARCHITECT — 时钟树架构编程软件
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QFM (SIA) | 6 | 查看选项 |
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