产品详情

Number of outputs 4 Output type LVPECL Output frequency (max) (MHz) 800 Core supply voltage (V) 3.3 Output supply voltage (V) 3.3 Input type LVCMOS, LVPECL Operating temperature range (°C) -40 to 85 Features Integrated integer-N PLL, uWire Rating Catalog
Number of outputs 4 Output type LVPECL Output frequency (max) (MHz) 800 Core supply voltage (V) 3.3 Output supply voltage (V) 3.3 Input type LVCMOS, LVPECL Operating temperature range (°C) -40 to 85 Features Integrated integer-N PLL, uWire Rating Catalog
WQFN (RHS) 48 49 mm² 7 x 7

  • 20 fs additive jitter
  • Integrated Integer-N PLL with outstanding normalized phase noise contribution of -224 dBc/Hz
  • Clock output frequency range of 1 to 800 MHz
  • 4 LVPECL clock outputs
  • Dedicated divider and delay blocks on each clock output
  • Pin compatible family of clocking devices
  • 3.15 to 3.45 V operation
  • Package: 48 pin LLP (7.0 x 7.0 x 0.8 mm)

  • Target Applications

  • Data Converter Clocking
  • Networking, SONET/SDH, DSLAM
  • Wireless Infrastructure
  • Medical
  • Test and Measurement
  • Military / Aerospace

  • 20 fs additive jitter
  • Integrated Integer-N PLL with outstanding normalized phase noise contribution of -224 dBc/Hz
  • Clock output frequency range of 1 to 800 MHz
  • 4 LVPECL clock outputs
  • Dedicated divider and delay blocks on each clock output
  • Pin compatible family of clocking devices
  • 3.15 to 3.45 V operation
  • Package: 48 pin LLP (7.0 x 7.0 x 0.8 mm)

  • Target Applications

  • Data Converter Clocking
  • Networking, SONET/SDH, DSLAM
  • Wireless Infrastructure
  • Medical
  • Test and Measurement
  • Military / Aerospace

  • The LMK02002 precision clock conditioner combines the functions of jitter cleaning/reconditioning, multiplication, and distribution of a reference clock. The device integrates a high performance Integer-N Phase Locked Loop (PLL), and four LVPECL clock output distribution blocks.

    Each clock distribution block includes a programmable divider, a phase synchronization circuit, a programmable delay, a clock output mux, and an LVPECL output buffer. This allows multiple integer-related and phase-adjusted copies of the reference to be distributed to eight system components.

    The clock conditioner comes in a 48-pin LLP package and is footprint compatible with other clocking devices in the same family.


    The LMK02002 precision clock conditioner combines the functions of jitter cleaning/reconditioning, multiplication, and distribution of a reference clock. The device integrates a high performance Integer-N Phase Locked Loop (PLL), and four LVPECL clock output distribution blocks.

    Each clock distribution block includes a programmable divider, a phase synchronization circuit, a programmable delay, a clock output mux, and an LVPECL output buffer. This allows multiple integer-related and phase-adjusted copies of the reference to be distributed to eight system components.

    The clock conditioner comes in a 48-pin LLP package and is footprint compatible with other clocking devices in the same family.


    下载 观看带字幕的视频 视频

    您可能感兴趣的相似产品

    open-in-new 比较替代产品
    功能与比较器件相似
    LMK01000 正在供货 具有 3 个 LVDS 和 5 个 LVPECL 输出的 1.6GHz 高性能时钟缓冲器、分频器和分配器 Distribution, Divide, And Delay Only
    LMK02000 正在供货 具有集成 PLL 和 3 个 LVDS/5 个 LVPECL 输出的 1 至 800MHz 精密时钟分配器 Includes PLL For Use With External VCO/VCXO.
    LMK03200 正在供货 具有集成 VCO 的精密 0 延迟时钟调节器 0-delay Outputs With PLL+VCO For Jitter Cleaning And Clock Generation

    技术文档

    star =有关此产品的 TI 精选热门文档
    未找到结果。请清除搜索并重试。
    查看全部 3
    顶层文档 类型 标题 格式选项 下载最新的英语版本 日期
    * 数据表 LMK02002 Precision Clock Conditioner with Integrated PLL 数据表 2007年 8月 16日
    应用手册 AN-1821 CPRI Repeater System (Rev. A) 2013年 4月 26日
    设计指南 Clock Conditioner Owner's Manual 2006年 11月 10日

    设计与开发

    如需其他信息或资源,请点击以下任一标题进入详情页面查看(如有)。

    软件编程工具

    CODELOADER CodeLoader Device Register Programming v4.19.0

    The CodeLoader 4 software is used to program the LMX PLLs and LMK timing devices through either the USB or line print terminal (LPT) port of a computer. This software also provides information on how to program the device by showing the bits that are actually sent.

    Which software do I use?

    Product

    (...)

    支持的产品和硬件

    支持的产品和硬件

    支持软件

    CLOCKDESIGNTOOL Clock Design Tool Software

    The Clock Design Tool software helps with part selection, loop filter design and simulation of timing device solutions. When you enter desired output frequencies and a reference frequency (optional), the tool provides TI devices to meet the specified requirements, divider values and a recommended (...)

    支持的产品和硬件

    支持的产品和硬件

    支持软件

    TICSPRO-SW TICS Pro GUI and Live Programming Tool for Clocking Devices

    Texas Instruments clocks and synthesizers (TICS) pro software is used to program the evaluation modules (EVMs) for product numbers with these prefixes: CDC, LMK and LMX. These products include phase-locked loops and voltage-controlled oscillators (PLL+VCO), synthesizers and clocking devices.

    支持的产品和硬件

    支持的产品和硬件

    下载选项
    设计工具

    CLOCK-TREE-ARCHITECT — 时钟树架构编程软件

    时钟树架构是一款时钟树综合工具,可根据您的系统要求生成时钟树解决方案,从而帮助您简化设计流程。该工具从庞大的时钟产品数据库中提取数据,然后生成系统级多芯片时钟解决方案。
    模拟工具

    PSPICE-FOR-TI — PSpice® for TI 设计和仿真工具

    PSpice® for TI 可提供帮助评估模拟电路功能的设计和仿真环境。此功能齐全的设计和仿真套件使用 Cadence® 的模拟分析引擎。PSpice for TI 可免费使用,包括业内超大的模型库之一,涵盖我们的模拟和电源产品系列以及精选的模拟行为模型。

    借助 PSpice for TI 的设计和仿真环境及其内置的模型库,您可对复杂的混合信号设计进行仿真。创建完整的终端设备设计和原型解决方案,然后再进行布局和制造,可缩短产品上市时间并降低开发成本。 

    在 PSpice for TI 设计和仿真工具中,您可以搜索 TI (...)
    封装 引脚 CAD 符号、封装和 3D 模型
    WQFN (RHS) 48 Ultra Librarian

    订购和质量

    包含信息:
    • RoHS
    • REACH
    • 器件标识
    • 引脚镀层/焊球材料
    • MSL 等级/回流焊峰值温度
    • MTBF/时基故障估算
    • 材料成分
    • 鉴定摘要
    • 持续可靠性监测
    包含信息:
    • 制造厂地点
    • 封装厂地点

    推荐产品可能包含与 TI 此产品相关的参数、评估模块或参考设计。

    支持和培训

    视频