产品详细信息

Function Clock generator Number of outputs 9 Output frequency (Max) (MHz) 1570 Core supply voltage (V) 3.3 Output supply voltage (V) 3.3 Input type LVPECL Output type LVDS Operating temperature range (C) -40 to 85 Features Integrated VCO, uWire Rating Catalog
Function Clock generator Number of outputs 9 Output frequency (Max) (MHz) 1570 Core supply voltage (V) 3.3 Output supply voltage (V) 3.3 Input type LVPECL Output type LVDS Operating temperature range (C) -40 to 85 Features Integrated VCO, uWire Rating Catalog
WQFN (RHS) 48 49 mm² 7 x 7
  • Integrated VCO with Very Low Phase Noise Floor
  • Integrated Integer-N PLL with Outstanding Normalized Phase Noise Contribution of -224 dBc/Hz
  • VCO Divider Values of 2 to 8 (All Divides)
  • Channel Divider Values of 1, 2 to 510 (even divides)
  • LVDS and LVPECL Clock Outputs
  • Partially Integrated Loop Filter
  • Dedicated Divider and Delay Blocks on Each Clock Output
  • Pin Compatible Family of Clocking Devices
  • 3.15 to 3.45 V Operation
  • Package: 48 Pin WQFN (7.0 x 7.0 x 0.8 mm)
  • 200 fs RMS Clock Generator Performance (10 Hz to 20 MHz) with a Clean Input Clock

All trademarks are the property of their respective owners.

  • Integrated VCO with Very Low Phase Noise Floor
  • Integrated Integer-N PLL with Outstanding Normalized Phase Noise Contribution of -224 dBc/Hz
  • VCO Divider Values of 2 to 8 (All Divides)
  • Channel Divider Values of 1, 2 to 510 (even divides)
  • LVDS and LVPECL Clock Outputs
  • Partially Integrated Loop Filter
  • Dedicated Divider and Delay Blocks on Each Clock Output
  • Pin Compatible Family of Clocking Devices
  • 3.15 to 3.45 V Operation
  • Package: 48 Pin WQFN (7.0 x 7.0 x 0.8 mm)
  • 200 fs RMS Clock Generator Performance (10 Hz to 20 MHz) with a Clean Input Clock

All trademarks are the property of their respective owners.

The LMK03000 family of precision clock conditioners combine the functions of jitter cleaning/reconditioning, multiplication, and distribution of a reference clock. The devices integrate a Voltage Controlled Oscillator (VCO), a high performance Integer-N Phase Locked Loop (PLL), a partially integrated loop filter, and up to eight outputs in various LVDS and LVPECL combinations.

The VCO output is optionally accessible on the Fout port. Internally, the VCO output goes through a VCO Divider to feed the various clock distribution blocks.

Each clock distribution block includes a programmable divider, a phase synchronization circuit, a programmable delay, a clock output mux, and an LVDS or LVPECL output buffer. This allows multiple integer-related and phase-adjusted copies of the reference to be distributed to eight system components.

The clock conditioners come in a 48-pin WQFN package and are footprint compatible with other clocking devices in the same family.



The LMK03000 family of precision clock conditioners combine the functions of jitter cleaning/reconditioning, multiplication, and distribution of a reference clock. The devices integrate a Voltage Controlled Oscillator (VCO), a high performance Integer-N Phase Locked Loop (PLL), a partially integrated loop filter, and up to eight outputs in various LVDS and LVPECL combinations.

The VCO output is optionally accessible on the Fout port. Internally, the VCO output goes through a VCO Divider to feed the various clock distribution blocks.

Each clock distribution block includes a programmable divider, a phase synchronization circuit, a programmable delay, a clock output mux, and an LVDS or LVPECL output buffer. This allows multiple integer-related and phase-adjusted copies of the reference to be distributed to eight system components.

The clock conditioners come in a 48-pin WQFN package and are footprint compatible with other clocking devices in the same family.



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技术文档

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类型 标题 下载最新的英文版本 日期
* 数据表 LMK03000 Family Precision Clock Conditioner with Integrated VCO 数据表 (Rev. O) 2013年 3月 15日
技术文章 How to select an optimal clocking solution for your FPGA-based design 2015年 12月 9日
技术文章 Clocking sampled systems to minimize jitter 2014年 7月 31日
技术文章 Timing is Everything: How to optimize clock distribution in PCIe applications 2014年 3月 28日
用户指南 Precision Clock Conditioner with Integrated VCO (1185 - 1296 MHz) (Rev. A) 2013年 11月 29日
应用手册 AN-1734 Using the LMK03000C to Clean Recovered Clocks (Rev. B) 2013年 4月 26日
应用手册 AN-1821 CPRI Repeater System (Rev. A) 2013年 4月 26日
应用手册 AN-1865 Frequency Synthesis and Planning for PLL Architectures (Rev. C) 2013年 4月 26日
应用手册 AN-2006 Synchronizing a DP83640 PTP Master to a GPS Receiver (Rev. A) 2013年 4月 26日
应用手册 High Speed ADCs with Interfacing, Driving and Clocking Schemes (Rev. A) 2013年 4月 26日
应用手册 Phase Synchronization with Multiple Devices and Frequencies (Rev. A) 2013年 4月 26日
应用手册 High Speed ADCs with Interfacing, Driving and Clocking Schemes (cn) 下载最新的英文版本 (Rev.A) 2007年 9月 20日
应用手册 Generating Precision Clocks for Time- Interleaved ADCs 2007年 8月 2日
设计指南 Clock Conditioner Owner's Manual 2006年 11月 10日

设计与开发

有关其他条款或所需资源,请点击下面的任何链接来查看详情页面。

评估板

LMK03000CEVAL — 具有集成 VCO (1185 - 1296 MHz) 的精密时钟调节器

The LMK03000C Evaluation Board simplifies evaluation of the LMK03000C Precision Clock Conditioner with Integrated VCO. The package consists of an Evaluation Board, Evaluation Board Instructions, and a cable for programming the device through a PC parallel port. Code-Loader is the software used to (...)

现货
数量限制: 2
应用软件和框架

CLOCKDESIGNTOOL — 时钟设计工具 - 环路滤波器和器件配置 + 仿真

The Clock Design Tool software helps with part selection, loop filter design and simulation of timing device solutions. When you enter desired output frequencies and a reference frequency (optional), the tool provides TI devices to meet the specified requirements, divider values and a recommended (...)
IDE、配置、编译器或调试器

CODELOADER — CodeLoader 器件寄存器编程

The CodeLoader 4 software is used to program the LMX PLLs and LMK timing devices through either the USB or line print terminal (LPT) port of a computer. This software also provides information on how to program the device by showing the bits that are actually sent.


Which software do I use?

Product

Loop (...)

仿真模型

LMK03000 IBIS Model

SNAM021.ZIP (35 KB) - IBIS Model
仿真工具

PSPICE-FOR-TI — PSPICE® for TI design and simulation tool

PSpice® for TI 可提供帮助评估模拟电路功能的设计和仿真环境。此功能齐全的设计和仿真套件使用 Cadence® 的模拟分析引擎。PSpice for TI 可免费使用,包括业内超大的模型库之一,涵盖我们的模拟和电源产品系列以及精选的模拟行为模型。

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在 PSpice for TI 设计和仿真工具中,您可以搜索 TI 器件、了解产品系列、打开测试台并对您的设计进行仿真,从而进一步分析选定的器件。您还可对多个 TI 器件进行联合仿真,以更好地展现您的系统。

除了一个完整的预加载模型库之外,您还可以在 PSPICE-FOR-TI 工具中轻松访问 TI 器件的全新技术资料。在您确认找到适合您应用的器件后,可访问 TI store 购买产品。 

借助 PSpice for TI,您可使用合适的工具来满足您在整个设计周期(从电路探索到设计开发和验证)的仿真需求。免费获取、轻松入门。立即下载 PSpice 设计和仿真套件,开始您的设计。

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设计工具

CLOCK-TREE-ARCHITECT — 时钟树架构编程软件

时钟树架构是一款时钟树综合工具,可根据您的系统要求生成时钟树解决方案,从而帮助您简化设计流程。该工具从庞大的时钟产品数据库中提取数据,然后生成系统级多芯片时钟解决方案。
封装 引脚 下载
WQFN (RHS) 48 了解详情

订购与质量

包含信息:
  • RoHS
  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/FIT 估算
  • 材料成分
  • 认证摘要
  • 持续可靠性监测

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