SPRUJD4A December 2024 – November 2025 AM62D-Q1
The state of the RTC time counter must be kept safe from corruption in the event of an uncontrolled power-down scenario. Since an uncontrolled power-down may cause metastable or unexpected inputs to the battery-backed domain while the core voltage drops, some mechanism needs to be in place to prevent those transient signals from writing invalid data into the battery-backed domain.
The solution implemented by RTC is the RTC_KICK0 and RTC_KICK1 registers. In order to benefit from this functional protection, the functional protection state machine must be left in the locked state when RTC MMRs are not being written. Practically speaking, these registers make it very unlikely for the transient behavior on power loss to appear like a “KICK0+KICK1+other” MMR write sequence. This functional protection affects both P1500 and VBUS accesses.
When the power-off functionality is enabled in the RTC_GENRAL_CTL register, then writing 1 to the SW_OFF bit will re-lock the functional protection mechanism. This affects the possible write sequences when approaching the OFF condition. Writing SW_OFF also leaves RTC in a non-functional state where further operations are not possible unless the RTC CORE domain is reset with rst_mod_g_rst_n signal, or unless the power-off recovery sequence is used. Resetting the RTC CORE domain is likely to be faster than having software recover RTC from the power-down condition in many cases because the power-down recovery sequence requires a certain number of 32768Hz clock cycles to complete.
It is an error to write the unlock sequence when the functional protection mechanism is already in the unlocked state. The consequence of the error would be that the core domain and the battery domain no longer agree on the unlocked status of the functional protection mechanism. This would not be diagnosable in software and there is no recommended error recovery sequence for this condition.