SPRUJD4A December 2024 – November 2025 AM62D-Q1
Debug Suspend Router Connections are shown in Table 4-315 and Table 4-316.
| Index | Connection |
|---|---|
| 0 | COMPUTE_CLUSTER0.CPU0 |
| 1 | COMPUTE_CLUSTER0.CPU1 |
| 2 | COMPUTE_CLUSTER0.CPU2 |
| 3 | COMPUTE_CLUSTER0.CPU3 |
| 4-8 | Reserved |
| 9 | C7X256V0 |
| 10-22 | Reserved |
| 23 | WKUP_R5FSS0 |
| 24 | MCU_R5FSS0 |
| 27-31 | Reserved |
| Index | Connection |
|---|---|
| 0 | WKUP_GTC0 |
| 1 | CPSW0 |
| 2 | DMASS0 |
| 3 | SA3_SS0 |
| 5-7 | Reserved |
| 8 | TIMER0 |
| 9 | TIMER1 |
| 10 | TIMER2 |
| 11 | TIMER3 |
| 12 | TIMER4 |
| 13 | TIMER5 |
| 14 | TIMER6 |
| 15 | TIMER7 |
| 16 | MCU_TIMER0 |
| 17 | MCU_TIMER1 |
| 18 | MCU_TIMER2 |
| 19 | MCU_TIMER3 |
| 20 | Reserved |
| 21 | WKUP_TIMER0 |
| 22 | WKUP_TIMER1 |
| 23 | Reserved |
| 24 | EPWM0 |
| 25 | EPWM1 |
| 26 | EPWM2 |
| 27 | Reserved |
| 28 | MCAN0 |
| 29 | MCU_MCAN0 |
| 30 | MCU_MCAN1 |
| 31 | Reserved |
| 32 | MCRC64_0 |
| 33 | MCU_MCRC64_0 |
| 34 | Reserved |
| 35 | I2C0 |
| 36 | I2C1 |
| 37 | I2C2 |
| 38 | I2C3 |
| 39 | MCU_I2C0 |
| 40 | WKUP_I2C0 |
| 41 | Reserved |
| 42 | ECAP0 |
| 43 | ECAP1 |
| 44 | ECAP2 |
| 45 | EQEP0 |
| 46 | EQEP1 |
| 47 | EQEP2 |
| 48-49 | Reserved |
| 50 | PDMA0 |
| 51 | PDMA1 |
| 52 | PDMA2 |
| 53 | Reserved |
| 54 | RTI2 |
| 55 | RTI3 |
| 56 | RTI0 |
| 57 | RTI1 |
| 58 | RTI4 |
| 59 | MCU_RTI0 |
| 60 | WKUP_RTI0 |
| 61-63 | Reserved |