SPRUJD4A December 2024 – November 2025 AM62D-Q1
There are two PSC controls for the FSS: for FSS0 itself and for FSS0_OSPI0. The CPU enables the FSS0_OSPI0 before using the FSS. Software should ensure the FSS0_OSPI0 is enabled prior to FSS transactions.
Normal Power Down Sequence: