SPRUJD4A December 2024 – November 2025 AM62D-Q1
This device supports Low Power & Deepsleep modes where parts of the device are switched-off through internal Power-Domain switches. To support these low power modes the device is partitioned so that only a small region is kept active (Wake-up) and the rest can be powered off through power-down switches. During deepsleep mode, several power-domains in Main domain are powered off and its PORz will be asserted.
Figure 6-29 shows the high-level overview of Power domain partitions.
Figure 6-31 depicts a high-level deep-sleep sequence. For more details please refer to Low Power Management Chapter.