SPRUJD4A December 2024 – November 2025 AM62D-Q1
TBR Status Register This register indicates status of various functions performed by CT-TBR
Return to Summary Table
| Instance Name | Physical Address |
|---|---|
| DEBUGSS0 | 0007 3C02 500Ch |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED | |||||||
| R | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED | |||||||
| R | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED | |||||||
| R | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED | RESET_OUT | PARTIAL_OUT | DRAIN_DONE | FMT_DONE | CPT_DONE | TRIG | WRAP |
| R | R | R | R | R | R | R | R |
| 0h | 0h | 1h | 0h | 1h | 0h | 0h | 0h |
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:7 | RESERVED | R | 0h | |
| 6 | RESET_OUT | R | 0h | Reset Active bit indicates that at least one of the domains in the CT-TBR is currently being held in reset. Read 0b : All domains and/or interfaces of the CT-TBR are out of reset Read 1b : At least one of the domains and/or interfaces of the CT-TBR are being held in reset |
| 5 | PARTIAL_OUT | R | 1h | Indicates that a partial output block (0 < Level < Trigger Threshold) is in the TBR memory (output buffer and possibly local RAM) and that an OUTFLUSH sequence may be required since there is no valid data to available to increase the amount of data past the OUTLVL threshold (i.e. local RAM buffer is empty). This bit is not set if the partial output block is the result of currently active block read request (i.e. it is already actively draining). This bit is only valid in System Bridge Mode. Read 0b : A partial frame does not exist or there is pending data in the local data RAMs that might complete any partial output blocks. Read 1b : A partial output block is in the buffer and there is not valid data available to push this through the system without an OUTFLUSH. Enabling acquisition (CTRL : ENBL 0- > 1) resets the output FIFO pointers and RAM pointers, so this bit will be set to 0 each time acquisition is enabled. |
| 4 | DRAIN_DONE | R | 0h | Indicates the whether there is data in the output FIFO. This bit is only valid in System Bridge Mode. Read 0b : There is still valid data in the CT-TBR output FIFO Read 1b : All valid data in the CT-TBR output FIFO has been transferred via the system interface. Enabling acquisition (CTRL : ENBL 0- > 1) resets the output FIFO pointers, so this bit will be set to 0 each time acquisition is enabled. |
| 3 | FMT_DONE | R | 1h | Indicates that all pending local memory transactions from the formatter are complete and no more data will be posted from the formatter. Read 0b : Data may still be pending Read 1b : Final data from the formatter has been posted. This bit is reset to 0b when the CTRL : ENBL transitions from 0b to 1b. |
| 2 | CPT_DONE | R | 0h | Indicates that ATB interface is disabled and trace data capture is complete. Read 0b : Trace capture still active Read 1b : Trace capture complete This bit is reset to 0b when the CTRL : ENBL transitions from 0b to 1b. |
| 1 | TRIG | R | 0h | Indicates that the local memory buffer has been locked as the result of a trigger. This bit is only valid in Buffer Mode and will always read 0 in System Bridge mode Read 0b : No trigger seen. Read 1b : Trigger input detected and buffer locked This bit is reset to 0b when the CTRL : ENBL transitions from 0b to 1b. |
| 0 | WRAP | R | 0h | This bit is active in buffer mode only and is not present in CT-TBR configurations that only support System bridge mode Indicates that the local memory write pointer has incremented past the upper boundary of the memory reset to the lowest address (at least once). Read 0b : No wrap Read 1b : Write pointer has wrapped This bit is reset to 0b when the CTRL : ENBL transitions from 0b to 1b |