产品详细信息

CPU Arm Cortex-R4F Frequency (MHz) 160, 180 ADC 2 x 12-Bit (24ch) GPIO 58, 101 UART 2 Number of I2Cs 1 Features Hercules high-performance microcontroller TI functional safety category Functional Safety-Compliant Operating temperature range (C) -40 to 125
CPU Arm Cortex-R4F Frequency (MHz) 160, 180 ADC 2 x 12-Bit (24ch) GPIO 58, 101 UART 2 Number of I2Cs 1 Features Hercules high-performance microcontroller TI functional safety category Functional Safety-Compliant Operating temperature range (C) -40 to 125
LQFP (PGE) 144 484 mm² 22 x 22 NFBGA (ZWT) 337 256 mm² 16 x 16
  • High-Performance Automotive-Grade Microcontroller for Safety-Critical Applications
    • Dual CPUs Running in Lockstep
    • ECC on Flash and RAM Interfaces
    • Built-In Self-Test (BIST) for CPU and On-chip RAMs
    • Error Signaling Module With Error Pin
    • Voltage and Clock Monitoring
  • ARM Cortex-R4F 32-Bit RISC CPU
    • 1.66 DMIPS/MHz With 8-Stage Pipeline
    • FPU With Single- and Double-Precision
    • 12-Region Memory Protection Unit (MPU)
    • Open Architecture With Third-Party Support
  • Operating Conditions
    • Up to 180-MHz System Clock
    • Core Supply Voltage (VCC): 1.14 to 1.32 V
    • I/O Supply Voltage (VCCIO): 3.0 to 3.6 V
  • Integrated Memory
    • 1.25MB of Program Flash With ECC
    • 192KB of RAM With ECC
    • 64KB of Flash for Emulated EEPROM With ECC
  • 16-Bit External Memory Interface (EMIF)
  • Common Platform Architecture
    • Consistent Memory Map Across Family
    • Real-Time Interrupt (RTI) Timer (OS Timer)
    • 128-Channel Vectored Interrupt Module (VIM)
    • 2-Channel Cyclic Redundancy Checker (CRC)
  • Direct Memory Access (DMA) Controller
    • 16 Channels and 32 Control Packets
    • Parity Protection for Control Packet RAM
    • DMA Accesses Protected by Dedicated MPU
  • Frequency-Modulated Phase-Locked Loop (FMPLL) With Built-In Slip Detector
  • Separate Nonmodulating PLL
  • IEEE 1149.1 JTAG, Boundary Scan and ARM CoreSight Components
  • Advanced JTAG Security Module (AJSM)
  • Calibration Capabilities
    • Parameter Overlay Module (POM)
  • 16 General-Purpose Input/Output (GPIO) Pins Capable of Generating Interrupts
  • Enhanced Timing Peripherals for Motor Control
    • 7 Enhanced Pulse Width Modulator (ePWM) Modules
    • 6 Enhanced Capture (eCAP) Modules
    • 2 Enhanced Quadrature Encoder Pulse (eQEP) Modules
  • Two Next Generation High-End Timer (N2HET) Modules
    • N2HET1: 32 Programmable Channels
    • N2HET2: 18 Programmable Channels
    • 160-Word Instruction RAM Each With Parity Protection
    • Each N2HET Includes Hardware Angle Generator
    • Dedicated High-End Timer Transfer Unit (HTU) for Each N2HET
  • Two 12-Bit Multibuffered ADC Modules
    • ADC1: 24 Channels
    • ADC2: 16 Channels Shared With ADC1
    • 64 Result Buffers Each With Parity Protection
  • Multiple Communication Interfaces
    • 10/100 Mbps Ethernet MAC (EMAC)
      • IEEE 802.3 Compliant (3.3-V I/O Only)
      • Supports MII, RMII, and MDIO
    • FlexRay Controller With 2 Channels
      • 8KB of Message RAM With Parity Protection
      • Dedicated FlexRay Transfer Unit (FTU)
    • Three CAN Controllers (DCANs)
      • 64 Mailboxes Each With Parity Protection
      • Compliant to CAN Protocol Version 2.0A and 2.0B
    • Inter-Integrated Circuit (I2C)
    • Three Multibuffered Serial Peripheral Interface (MibSPI) Modules
      • 128 Words Each With Parity Protection
      • 8 Transfer Groups
    • Up to Two Standard Serial Peripheral Interface (SPI) Modules
    • Two UART (SCI) Interfaces, One With Local Interconnect Network (LIN 2.1) Interface Support
  • Packages
    • 144-Pin Quad Flatpack (PGE) [Green]
    • 337-Ball Grid Array (ZWT) [Green]
  • High-Performance Automotive-Grade Microcontroller for Safety-Critical Applications
    • Dual CPUs Running in Lockstep
    • ECC on Flash and RAM Interfaces
    • Built-In Self-Test (BIST) for CPU and On-chip RAMs
    • Error Signaling Module With Error Pin
    • Voltage and Clock Monitoring
  • ARM Cortex-R4F 32-Bit RISC CPU
    • 1.66 DMIPS/MHz With 8-Stage Pipeline
    • FPU With Single- and Double-Precision
    • 12-Region Memory Protection Unit (MPU)
    • Open Architecture With Third-Party Support
  • Operating Conditions
    • Up to 180-MHz System Clock
    • Core Supply Voltage (VCC): 1.14 to 1.32 V
    • I/O Supply Voltage (VCCIO): 3.0 to 3.6 V
  • Integrated Memory
    • 1.25MB of Program Flash With ECC
    • 192KB of RAM With ECC
    • 64KB of Flash for Emulated EEPROM With ECC
  • 16-Bit External Memory Interface (EMIF)
  • Common Platform Architecture
    • Consistent Memory Map Across Family
    • Real-Time Interrupt (RTI) Timer (OS Timer)
    • 128-Channel Vectored Interrupt Module (VIM)
    • 2-Channel Cyclic Redundancy Checker (CRC)
  • Direct Memory Access (DMA) Controller
    • 16 Channels and 32 Control Packets
    • Parity Protection for Control Packet RAM
    • DMA Accesses Protected by Dedicated MPU
  • Frequency-Modulated Phase-Locked Loop (FMPLL) With Built-In Slip Detector
  • Separate Nonmodulating PLL
  • IEEE 1149.1 JTAG, Boundary Scan and ARM CoreSight Components
  • Advanced JTAG Security Module (AJSM)
  • Calibration Capabilities
    • Parameter Overlay Module (POM)
  • 16 General-Purpose Input/Output (GPIO) Pins Capable of Generating Interrupts
  • Enhanced Timing Peripherals for Motor Control
    • 7 Enhanced Pulse Width Modulator (ePWM) Modules
    • 6 Enhanced Capture (eCAP) Modules
    • 2 Enhanced Quadrature Encoder Pulse (eQEP) Modules
  • Two Next Generation High-End Timer (N2HET) Modules
    • N2HET1: 32 Programmable Channels
    • N2HET2: 18 Programmable Channels
    • 160-Word Instruction RAM Each With Parity Protection
    • Each N2HET Includes Hardware Angle Generator
    • Dedicated High-End Timer Transfer Unit (HTU) for Each N2HET
  • Two 12-Bit Multibuffered ADC Modules
    • ADC1: 24 Channels
    • ADC2: 16 Channels Shared With ADC1
    • 64 Result Buffers Each With Parity Protection
  • Multiple Communication Interfaces
    • 10/100 Mbps Ethernet MAC (EMAC)
      • IEEE 802.3 Compliant (3.3-V I/O Only)
      • Supports MII, RMII, and MDIO
    • FlexRay Controller With 2 Channels
      • 8KB of Message RAM With Parity Protection
      • Dedicated FlexRay Transfer Unit (FTU)
    • Three CAN Controllers (DCANs)
      • 64 Mailboxes Each With Parity Protection
      • Compliant to CAN Protocol Version 2.0A and 2.0B
    • Inter-Integrated Circuit (I2C)
    • Three Multibuffered Serial Peripheral Interface (MibSPI) Modules
      • 128 Words Each With Parity Protection
      • 8 Transfer Groups
    • Up to Two Standard Serial Peripheral Interface (SPI) Modules
    • Two UART (SCI) Interfaces, One With Local Interconnect Network (LIN 2.1) Interface Support
  • Packages
    • 144-Pin Quad Flatpack (PGE) [Green]
    • 337-Ball Grid Array (ZWT) [Green]

The TMS570LS1227 device is a high-performance automotive-grade microcontroller family for safety systems. The safety architecture includes dual CPUs in lockstep, CPU and memory BIST logic, ECC on both the flash and the data SRAM, parity on peripheral memories, and loopback capability on peripheral I/Os.

The TMS570LS1227 device integrates the ARM Cortex-R4F floating-point CPU which offers an efficient 1.66 DMIPS/MHz, and has configurations which can run up to 180 MHz providing up to 298 DMIPS. The device supports the word-invariant big-endian [BE32] format.

The TMS570LS1227 device has 1.25MB of integrated flash and 192KB of data RAM with single-bit error correction and double-bit error detection. The flash memory on this device is a nonvolatile, electrically erasable and programmable memory, implemented with a 64-bit-wide data bus interface. The flash operates on a 3.3-V supply input (same level as I/O supply) for all read, program, and erase operations. When in pipeline mode, the flash operates with a system clock frequency of up to 180 MHz. The SRAM supports single-cycle read and write accesses in byte, halfword, word, and double-word modes throughout the supported frequency range.

The TMS570LS1227 device features peripherals for real-time control-based applications, including two Next Generation High-End Timer (N2HET) timing coprocessors with up to 44 I/O terminals, seven Enhanced Pulse Width Modulator (ePWM) modules with up to 14 outputs, six Enhanced Capture (eCAP) modules, two Enhanced Quadrature Encoder Pulse (eQEP) modules, and two 12-bit Analog-to-Digital Converters (ADCs) supporting up to 24 inputs.

The N2HET is an advanced intelligent timer that provides sophisticated timing functions for real-time applications. The timer is software-controlled, using a reduced instruction set, with a specialized timer micromachine and an attached I/O port. The N2HET can be used for pulse-width-modulated outputs, capture or compare inputs, or general-purpose I/O (GIO). The N2HET is especially well suited for applications requiring multiple sensor information and drive actuators with complex and accurate time pulses. A High-End Timer Transfer Unit (HTU) can perform DMA-type transactions to transfer N2HET data to or from main memory. A Memory Protection Unit (MPU) is built into the HTU.

The ePWM module can generate complex pulse width waveforms with minimal CPU overhead or intervention. The ePWM is easy to use and it supports both high-side and low-side PWM and deadband generation. With integrated trip zone protection and synchronization with the on-chip MibADC, the ePWM module is ideal for digital motor control applications.

The eCAP module is essential in systems where the accurately timed capture of external events is important. The eCAP can also be used to monitor the ePWM outputs or for simple PWM generation when the eCAP is not needed for capture applications.

The eQEP module is used for direct interface with a linear or rotary incremental encoder to get position, direction, and speed information from a rotating machine as used in high-performance motion and position-control systems.

The device has two 12-bit-resolution MibADCs with 24 total inputs and 64 words of parity-protected buffer RAM each. The MibADC channels can be converted individually or can be grouped by software for sequential conversion sequences. Sixteen inputs are shared between the two MibADCs. Each MibADC supports three separate groupings of channels. Each group can be converted once when triggered or configured for continuous conversion mode. The MibADC has a 10-bit mode for use when compatibility with older devices or faster conversion time is desired. MibADC1 also supports the use of external analog multiplexers.

The device has multiple communication interfaces: three MibSPIs, two SPIs, one LIN, one SCI, three DCANs, one I2C, one Ethernet, and one FlexRay controller with two channels. The SPI provides a convenient method of serial high-speed communications between similar shift-register type devices. The LIN supports the Local Interconnect standard 2.0 and can be used as a UART in full-duplex mode using the standard Non-Return-to-Zero (NRZ) format. The DCAN supports the CAN 2.0 (A and B) protocol standard and uses a serial, multimaster communication protocol that efficiently supports distributed real-time control with robust communication rates of up to 1 Mbps. The DCAN is ideal for systems operating in noisy and harsh environments (for example, automotive and industrial fields) that require reliable serial communication or multiplexed wiring. The FlexRay controller uses a dual-channel serial, fixed time base multimaster communication protocol with communication rates of 10 Mbps per channel. A FlexRay Transfer Unit (FTU) enables autonomous transfers of FlexRay data to and from main CPU memory. Transfers are protected by a dedicated, built-in MPU. The Ethernet module supports MII, RMII, and MDIO interfaces.

The I2C module is a multimaster communication module providing an interface between the microcontroller and an I2C-compatible device through the I2C serial bus. The I2C supports speeds of 100 and 400 Kbps.

A Frequency-Modulated Phase-Locked Loop (FMPLL) clock module is used to multiply the external frequency reference to a higher frequency for internal use. The Global Clock Module (GCM) manages the mapping between the available clock sources and the device clock domains.

The device also has an External Clock Prescaler (ECP) module that when enabled, outputs a continuous external clock on the ECLK terminal. The ECLK frequency is a user-programmable ratio of the peripheral interface clock (VCLK) frequency. This low-frequency output can be monitored externally as an indicator of the device operating frequency.

The Direct Memory Access (DMA) controller has 16 channels, 32 control packets, and parity protection on its memory. An MPU is built into the DMA to protect memory against erroneous transfers.

The Error Signaling Module (ESM) monitors all device errors and determines whether an interrupt or external error pin (ball) is triggered when a fault is detected. The nERROR terminal can be monitored externally as an indicator of a fault condition in the microcontroller.

The External Memory Interface (EMIF) provides a memory extension to asynchronous and synchronous memories or other slave devices.

A Parameter Overlay Module (POM) enhances the calibration capabilities of application code. The POM can reroute flash accesses to internal memory or to the EMIF, thus avoiding the reprogramming steps necessary for parameter updates in flash.

With integrated safety features and a wide choice of communication and control peripherals, the TMS570LS1227 device is an ideal solution for high-performance real-time control applications with safety-critical requirements.

The TMS570LS1227 device is a high-performance automotive-grade microcontroller family for safety systems. The safety architecture includes dual CPUs in lockstep, CPU and memory BIST logic, ECC on both the flash and the data SRAM, parity on peripheral memories, and loopback capability on peripheral I/Os.

The TMS570LS1227 device integrates the ARM Cortex-R4F floating-point CPU which offers an efficient 1.66 DMIPS/MHz, and has configurations which can run up to 180 MHz providing up to 298 DMIPS. The device supports the word-invariant big-endian [BE32] format.

The TMS570LS1227 device has 1.25MB of integrated flash and 192KB of data RAM with single-bit error correction and double-bit error detection. The flash memory on this device is a nonvolatile, electrically erasable and programmable memory, implemented with a 64-bit-wide data bus interface. The flash operates on a 3.3-V supply input (same level as I/O supply) for all read, program, and erase operations. When in pipeline mode, the flash operates with a system clock frequency of up to 180 MHz. The SRAM supports single-cycle read and write accesses in byte, halfword, word, and double-word modes throughout the supported frequency range.

The TMS570LS1227 device features peripherals for real-time control-based applications, including two Next Generation High-End Timer (N2HET) timing coprocessors with up to 44 I/O terminals, seven Enhanced Pulse Width Modulator (ePWM) modules with up to 14 outputs, six Enhanced Capture (eCAP) modules, two Enhanced Quadrature Encoder Pulse (eQEP) modules, and two 12-bit Analog-to-Digital Converters (ADCs) supporting up to 24 inputs.

The N2HET is an advanced intelligent timer that provides sophisticated timing functions for real-time applications. The timer is software-controlled, using a reduced instruction set, with a specialized timer micromachine and an attached I/O port. The N2HET can be used for pulse-width-modulated outputs, capture or compare inputs, or general-purpose I/O (GIO). The N2HET is especially well suited for applications requiring multiple sensor information and drive actuators with complex and accurate time pulses. A High-End Timer Transfer Unit (HTU) can perform DMA-type transactions to transfer N2HET data to or from main memory. A Memory Protection Unit (MPU) is built into the HTU.

The ePWM module can generate complex pulse width waveforms with minimal CPU overhead or intervention. The ePWM is easy to use and it supports both high-side and low-side PWM and deadband generation. With integrated trip zone protection and synchronization with the on-chip MibADC, the ePWM module is ideal for digital motor control applications.

The eCAP module is essential in systems where the accurately timed capture of external events is important. The eCAP can also be used to monitor the ePWM outputs or for simple PWM generation when the eCAP is not needed for capture applications.

The eQEP module is used for direct interface with a linear or rotary incremental encoder to get position, direction, and speed information from a rotating machine as used in high-performance motion and position-control systems.

The device has two 12-bit-resolution MibADCs with 24 total inputs and 64 words of parity-protected buffer RAM each. The MibADC channels can be converted individually or can be grouped by software for sequential conversion sequences. Sixteen inputs are shared between the two MibADCs. Each MibADC supports three separate groupings of channels. Each group can be converted once when triggered or configured for continuous conversion mode. The MibADC has a 10-bit mode for use when compatibility with older devices or faster conversion time is desired. MibADC1 also supports the use of external analog multiplexers.

The device has multiple communication interfaces: three MibSPIs, two SPIs, one LIN, one SCI, three DCANs, one I2C, one Ethernet, and one FlexRay controller with two channels. The SPI provides a convenient method of serial high-speed communications between similar shift-register type devices. The LIN supports the Local Interconnect standard 2.0 and can be used as a UART in full-duplex mode using the standard Non-Return-to-Zero (NRZ) format. The DCAN supports the CAN 2.0 (A and B) protocol standard and uses a serial, multimaster communication protocol that efficiently supports distributed real-time control with robust communication rates of up to 1 Mbps. The DCAN is ideal for systems operating in noisy and harsh environments (for example, automotive and industrial fields) that require reliable serial communication or multiplexed wiring. The FlexRay controller uses a dual-channel serial, fixed time base multimaster communication protocol with communication rates of 10 Mbps per channel. A FlexRay Transfer Unit (FTU) enables autonomous transfers of FlexRay data to and from main CPU memory. Transfers are protected by a dedicated, built-in MPU. The Ethernet module supports MII, RMII, and MDIO interfaces.

The I2C module is a multimaster communication module providing an interface between the microcontroller and an I2C-compatible device through the I2C serial bus. The I2C supports speeds of 100 and 400 Kbps.

A Frequency-Modulated Phase-Locked Loop (FMPLL) clock module is used to multiply the external frequency reference to a higher frequency for internal use. The Global Clock Module (GCM) manages the mapping between the available clock sources and the device clock domains.

The device also has an External Clock Prescaler (ECP) module that when enabled, outputs a continuous external clock on the ECLK terminal. The ECLK frequency is a user-programmable ratio of the peripheral interface clock (VCLK) frequency. This low-frequency output can be monitored externally as an indicator of the device operating frequency.

The Direct Memory Access (DMA) controller has 16 channels, 32 control packets, and parity protection on its memory. An MPU is built into the DMA to protect memory against erroneous transfers.

The Error Signaling Module (ESM) monitors all device errors and determines whether an interrupt or external error pin (ball) is triggered when a fault is detected. The nERROR terminal can be monitored externally as an indicator of a fault condition in the microcontroller.

The External Memory Interface (EMIF) provides a memory extension to asynchronous and synchronous memories or other slave devices.

A Parameter Overlay Module (POM) enhances the calibration capabilities of application code. The POM can reroute flash accesses to internal memory or to the EMIF, thus avoiding the reprogramming steps necessary for parameter updates in flash.

With integrated safety features and a wide choice of communication and control peripherals, the TMS570LS1227 device is an ideal solution for high-performance real-time control applications with safety-critical requirements.

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Hercules TMS570LS1227 is certified by TÜV SÜD to be capable of achieving IEC 61508 SIL 3 helping to make it easier to develop functional safety applications. Download certificate now.

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类型 标题 下载最新的英文版本 日期
* 数据表 TMS570LS1227 16 位和 32 位 RISC 闪存微控制器 数据表 (Rev. B) 2015年 2月 28日
* 勘误表 TMS570LS12x/11x Microcontroller Silicon Errata (Silicon Revision B) (Rev. F) 2016年 5月 31日
* 勘误表 TMS570LS12x/11x Microcontroller Silicon Errata (Silicon Revision C) (Rev. C) 2016年 5月 31日
* 用户指南 TMS570LS12x/11x 16/32-Bit RISC Flash Microcontroller Technical Reference Manual (Rev. C) 2018年 3月 1日
技术文章 5 ways high-performance MCUs are reshaping the industry 2021年 7月 12日
更多文献资料 SafeTI™ Hercules™ Diagnostic Library Test Automation Unit User Guide (Rev. B) 2020年 1月 9日
用户指南 HALCoGen-CSP User's Guide (Rev. C) 2020年 1月 8日
用户指南 SafeTI Hercules Diagnostic Library -TAU Installation Guide (Rev. B) 2020年 1月 8日
更多文献资料 SafeTI-HALCoGen-CSP 04.07.01 (Rev. C) 2020年 1月 8日
用户指南 SafeTI-HALCoGen-CSP Installation Guide (Rev. B) 2020年 1月 8日
用户指南 SafeTI Hercules Diagnostic Library CSP Without LDRA 2019年 10月 29日
更多文献资料 Release Notes for SafeTI Diagnostic Library CSP 2019年 10月 17日
更多文献资料 SafeTI™ Hercules™ Diagnostic Library Release Notes (Rev. A) 2019年 9月 24日
应用手册 HALCoGen Ethernet Driver With lwIP Integration Demo and Active Webserver Demo 2019年 9月 13日
应用手册 Hercules PLL Advisory SSWF021#45 Workaround (Rev. B) 2019年 9月 9日
应用手册 CAN Bus Bootloader for Hercules Microcontrollers 2019年 8月 21日
应用手册 SafeTI HALCoGen CSP Without LDRA Release_Notes 2019年 8月 19日
用户指南 SafeTI Hercules Diagnostic Library - Without LDRA Installation Guide 2019年 8月 19日
用户指南 SafeTI-HALCoGen-CSP Without LDRA Installation Guide 2019年 8月 19日
用户指南 SafeTI-HALCoGen-CSP Without LDRA User's Guide 2019年 8月 19日
用户指南 SafeTI™ Hercules™ Diag Lib Test Automation Unit Without LDRA User's Guide 2019年 8月 19日
功能安全信息 TUEV SUED Certificate for SafeTI Functional Safety HW Development Process (Rev. A) 2019年 6月 7日
应用手册 Interfacing the Embedded 12-Bit ADC in a TMS570LS31x/21x and RM4x Series MCUs (Rev. A) 2018年 4月 20日
应用手册 FreeRTOS on Hercules Devices_new 2018年 4月 19日
应用手册 Sharing FEE Blocks Between Boot Loader and Application 2017年 11月 7日
用户指南 Hercules TMS570LS12x Development Kit User’s Guide 2017年 5月 31日
应用手册 Sharing Exception Vectors on Hercules™ Based Microcontrollers 2017年 3月 27日
应用手册 Hercules AJSM Unlock (Rev. A) 2016年 10月 19日
应用手册 How to Create a HalCoGen Based Project For CCSv4.x (Rev. B) 2016年 8月 9日
应用手册 Using the CRC Module on Hercules™-Based Microcontrollers 2016年 8月 4日
应用手册 Migrating from TMS570LS12x/11x to TMS570LS09x/07x MCUs (Rev. A) 2016年 6月 15日
更多文献资料 Functional Safety Audit: SafeTI Functional Safety Hardware Development (Rev. A) 2016年 4月 25日
应用手册 High Speed Serial Bus Using the MibSPIP Module on Hercule-Based MCUs 2016年 4月 22日
证书 TUEV SUED Certification and Report for TMS570LS12x/11x (Rev. C) 2016年 2月 18日
应用手册 Functional safety for Elevator Systems 2015年 12月 18日
功能安全信息 Safety Manual for TMS570LS12x/11x Hercules ARM Safety Critical MCUs (Rev. B) 2015年 12月 11日
应用手册 Triggering ADC Using Internal Timer Events on Hercules MCUs 2015年 10月 19日
白皮书 Generate/Measure Complex Timing Waveforms 2015年 9月 29日
应用手册 Continuous Monitor of the PLL Frequency With the DCC 2015年 7月 24日
应用手册 PWM Generation and Input Capture Using HALCoGen N2HET Module 2015年 6月 30日
白皮书 Foundational Software for Functional Safety 2015年 5月 12日
应用手册 Sine Wave Generation Using PWM With Hercules N2HET and HTU 2015年 5月 12日
应用手册 Triangle/Trapezoid Wave Generation Using PWM With Hercules N2HET 2015年 5月 1日
应用手册 Nested Interrupts on Hercules ARM Cortex-R4/5-Based Microncontrollers 2015年 4月 23日
白皮书 Latch-Up 2015年 4月 22日
应用手册 Interrupt and Exception Handling on Hercules ARM Cortex-R4/5-Based MCUs 2015年 4月 20日
应用手册 EMIF IODFT 2015年 4月 2日
应用手册 Hercules SCI With DMA 2015年 3月 22日
证书 TUV NORD Certificate for QRAS AP00213 SafeTI Functional Safety SW Dev. Process 2015年 2月 3日
应用手册 Calculating Equivalent Power-on-Hours for Hercules ARM Safety Critical MCUs 2015年 1月 26日
应用手册 Limiting Clamp Currents on TMS470/TMS570 Digital and Analog Inputs (Rev. A) 2014年 12月 8日
应用手册 Comp Cons: Mig from 570LS31x/21x or 570LS12x/11x to 570LS04/03x Safety MCUs (Rev. A) 2014年 9月 22日
用户指南 Concept Study of a Safety Architecture (TUV ISO 13849) 2014年 7月 2日
更多文献资料 HaLCoGen Release Notes 2014年 6月 25日
应用手册 Compatibility Considerations: Migrating TMS570LS31x/21x to TMS570LS12x/11x (Rev. A) 2014年 2月 19日
应用手册 Interfacing TPS65381 With Hercules Microcontrollers (Rev. A) 2014年 2月 14日
用户指南 TMS570LS12x Hercules Development Kit (HDK) User's Guide (Rev. A) 2013年 10月 10日
白皮书 IEC 60730 and UL 1998 Safety Standard Compliance Made Easier with TI Hercules 2013年 10月 3日
应用手册 SPI Bootloader for Hercules TMS570LS12X MCU 2013年 9月 16日
应用手册 UART Boot Loader for Hercules RM42 MCU 2013年 9月 16日
应用手册 UART Boot Loader for Hercules RM48 Microcontroller 2013年 9月 16日
白皮书 Model-Based Tool Qualification of the TI C/C++ ARM® Compiler 2013年 6月 6日
白皮书 Accelerating safety-certified motor control designs (Rev. A) 2012年 10月 4日
应用手册 Hercules Family Frequency Slewing to Reduce Voltage and Current Transients 2012年 7月 5日
应用手册 Basic PBIST Configuration and Influence on Current Consumption (Rev. C) 2012年 4月 12日
应用手册 Verification of Data Integrity Using CRC 2012年 2月 17日
应用手册 Setup the FlexRay Transfer Unit (FTU) 2012年 1月 26日
用户指南 HET Integrated Development Environment User's Guide (Rev. A) 2011年 11月 17日
应用手册 Important ARM Ltd Application Notes for TI Hercules ARM Safety MCUs 2011年 11月 17日
应用手册 Execution Time Measurement for Hercules ARM Safety MCUs (Rev. A) 2011年 11月 4日
应用手册 Use of All 1'’s and All 0's Valid in Flash EEPROM Emulation 2011年 9月 27日
应用手册 3.3-Volt Microprocessors in an Industrial Environment (Rev. A) 2011年 9月 6日
应用手册 TMSx70 Configuration of the SCI/LIN Module for UART Communication (Rev. A) 2011年 9月 6日
白皮书 Hercules™ Microcontrollers: Real-time MCUs for safety-critical products 2011年 9月 2日
应用手册 ECC handling in TMSx70 based microcontrollers 2011年 2月 23日
用户指南 TI ICEPick Module Type C Reference Guide Public Version 2011年 2月 17日
应用手册 NHET Getting Started (Rev. B) 2010年 8月 30日
应用手册 Generating Operating System Tick Using RTI on a TMSx70 Microcontoller 2010年 7月 13日
应用手册 Usage of MPU Subregions on TI TMSx70 Cortex Devices 2010年 3月 10日
用户指南 TI Assembly Language Tools Enhanced High-End Timer (NHET) Assembler User's Guide 2010年 3月 4日
白皮书 Discriminating between Soft Errors and Hard Errors in RAM White Paper 2008年 6月 4日

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调试探针

TMDSEMU560V2STM-U — Blackhawk XDS560v2 系统跟踪 USB 仿真器

XDS560v2 System Trace 是 XDS560v2 系列高性能 TI 处理器调试探针(仿真器)的第一种型号。XDS560v2 是 XDS 系列调试探针中性能最高的一款,同时支持传统 JTAG 标准 (IEEE1149.1) 和 cJTAG (IEEE1149.7)。

XDS560v2 System Trace 在其巨大的外部存储器缓冲区中加入了系统引脚跟踪。这种外部存储器缓冲区适用于指定的 TI 器件,通过捕获相关器件级信息,获得准确的总线性能活动和吞吐量,并对内核和外设进行电源管理。此外,对于带有嵌入式缓冲跟踪器 (ETB) 的所有 ARM 和 DSP 处理器,所有 XDS (...)

现货
数量限制: 1
调试探针

TMDSEMU560V2STM-UE — Spectrum Digital XDS560v2 系统跟踪 USB 和以太网

XDS560v2 System Trace 是 XDS560v2 系列高性能 TI 处理器调试探针(仿真器)的第一种型号。XDS560v2 是 XDS 系列调试探针中性能最高的一款,同时支持传统 JTAG 标准 (IEEE1149.1) 和 cJTAG (IEEE1149.7)。

XDS560v2 System Trace 在其巨大的外部存储器缓冲区中加入了系统引脚跟踪。这种外部存储器缓冲区适用于指定的 TI 器件,通过捕获相关器件级信息,获得准确的总线性能活动和吞吐量,并对内核和外设进行电源管理。此外,对于带有嵌入式缓冲跟踪器 (ETB) 的所有 ARM 和 DSP 处理器,所有 XDS (...)

现货
数量限制: 1
开发工具套件

LAUNCHXL2-TMS57012 — Hercules TMS570LS12x LaunchPad 评估套件

Hercules™ TMS570LS12 LaunchPad™ 开发套件是一个经济实惠的评估平台,旨在帮助您通过 Hercules 微控制器平台快速评估和开发。这款 LaunchPad 开发套件基于通过 IEC 61508 SIL 3 和 ISO 26262 ASIL D 认证的 TMS570LS1224,后者是一款基于 ARM® Cortex®-R4F 的锁步 MCU,具有集成的安全功能和外设,如两个 12 位 ADC、可编程高端计时器、电机控制外设(eQEP、eCAP、ePWM)、USB、以太网、MibSPI 以及串行通信接口。Hercules TMS570 MCU 有助于减少开发 (...)

现货
数量限制: 1
开发工具套件

TMDS570LS12HDK — TMS570LS12x/11x Hercules 开发套件

TMS570LS12x Hercules 开发套件是 Hercules TMS570LS12x/11x 安全微控制器开发入门的理想选择。该套件中包括一个开发板、一个直流电源、一根 mini-B 型 USB 电缆、一根以太网电缆以及软件安装 DVD,DVD 中包括 Code Composer Studio IDE、HALCoGen、nowFlash、演示软件及代码示例。该开发板包含一个板载 XDS100v2 JTAG 仿真器,并可与 MCU 的通信接口和所有外设引脚对接。

现货
数量限制: 1
代码示例或演示

HERCULES_SAFETY_MCU_DEMOS — Hercules 安全 MCU 演示

Hercules 安全 MCU 演示旨在强调 Hercules 微处理器平台的关键安全、数据采集和控制功能。该演示旨在与 Hercules USB 记忆棒开发工具或 Hercules 开发套件 (HDK) 一起在 PC 上运行。
驱动程序或库

HERCULES-DSPLIB — Hercules™ 安全 MCU Cortex™-R4 CMSIS DSP 库

TI's Cortex-R4 DSP library conforms to ARM’s Cortex Microcontroller Software Interface Standard (CMSIS), a standardized hardware abstraction layer for the Cortex processor series. The CMSIS-DSP library includes 60+ functions covering vector operations, matrix computing, complex arithmetic, filter (...)
驱动程序或库

HERCULES-F021FLASHAPI — HERCULES F021FLASHAPI

F021 闪存应用编程接口 (API) 提供的软件函数库使用户能够对 F021 片上闪存执行编程、擦除和验证操作。在为 F021 闪存微控制器创建闪存引导加载程序或其他编程实用工具时,必须使用这些功能。Hercules F021 闪存 API 支持基于 Cortex-R 的 TMS570 和 RM 产品线,但 TMS570LS20x/10x 除外。
驱动程序或库

SAFETI_DIAG_LIB — Hercules SafeTI™ 诊断库

Hercules SafeTI Diagnostic Library 针对 Hercules 安全 MCU 的各类安全特性集合了多种软件功能和响应处理程序。Hercules SafeTI Diagnostic Library 在呼叫者的保护环境中运行,并且在中断或异常上下文中处理所有响应。
IDE、配置、编译器或调试器

CCSTUDIO-SAFETY — 适用于 Hercules™ 安全 MCU 的 Code Composer Studio (CCS) 集成开发环境 (IDE)

Code Composer Studio 是一种集成开发环境 (IDE),支持 TI 的微控制器和嵌入式处理器产品系列。Code Composer Studio 包含一整套用于开发和调试嵌入式应用的工具。它包含了用于优化的 C/C++ 编译器、源码编辑器、项目构建环境、调试器、描述器以及多种其他功能。直观的 IDE 提供了单个用户界面,可帮助您完成应用开发流程的每个步骤。熟悉的工具和界面使用户能够比以前更快地入手。Code Composer Studio 将 Eclipse 软件框架的优点和 TI 先进的嵌入式调试功能相结合,为嵌入式开发人员提供了一个引人注目、功能丰富的开发环境。 

其他信息
IDE、配置、编译器或调试器

HALCOGEN — HAL 代码生成器工具

HALCoGen 允许用户为 Hercules™ 微控制器生成硬件抽象层器件驱动程序。利用 HALCoGen 提供的图形用户界面,用户可以配置外设、中断、时钟和 Hercules 微控制器的其他参数。Hercules 器件配置完毕后,用户可生成外设初始化和驱动程序代码,并将其导入 CCS、IAR Workbench 或 Keil uVision 中。
IDE、配置、编译器或调试器

HET_IDE — 高端定时器 (HET)

高端计时器集成开发环境 (HET IDE) 是一个 Windows 应用程序,它可以用于配置和模拟德州仪器 (TI) 的 HET 和 NHET 计时器协处理器。

HET IDE 是一种开始为高端计时器开发和调试代码的简单方法。

HET IDE 具有 3 个主要组件:简单易用的图形用户界面、NHET 模拟内核和 SynaptiCAD 集成波形查看器。HET IDE 在使用 SynaptiCAD 的 WaveFormer Pro 90 天免费许可时可取得最佳性能。

模拟内核可以提供无法在芯片样片上实现的全部可视化和中断功能。波形查看器是 SynaptiCAD 的 Waveformer (...)
IDE、配置、编译器或调试器

NHET-ASSEMBLER — NHET 汇编器工具

TI 的增强型高端计时器 (NHET) 模块可以为实时控制应用提供高级计时功能。

NHET 汇编器可将采用 NHET 汇编语言编写的程序转换成多种输出格式,以便在诸如 TI 的 Code Composer Studio 之类的代码生成工具中使用。
IDE、配置、编译器或调试器

SAFETI-HALCOGEN-CSP — SafeTI HALCoGen 兼容支持包

HALCoGen 兼容支持套件 (CSP) 的开发旨在提供必要的文档、报告和单元测试功能,帮助客户使用 HALCoGen 生成的软件来遵守 IEC 61508 和 ISO 26262 等功能安全标准。

必要条件:

下列各项是运行附带 SafeTI HALCoGen CSP 的测试自动化单元所必需的。
  • Windows 操作系统
  • TI CCStudio v5 或更高版本(请在此处下载)
  • TI ARM 编译器 v5.1 或更高版本(附在 CCstudio 中)
  • 必须安装 Perl v5.0.8 或更高版本。请参阅 PERL 网站
IDE、配置、编译器或调试器

SAFETI-HERCULES-DIAG-LIB-CSP — SafeTI Hercules 诊断库兼容支持包

SafeTI Hercules 诊断库兼容支持套件 (CSP) 的开发旨在提供必要的文档和报告,帮助客户使用 SafeTI Hercules 诊断库来遵守 IEC 61508 和 ISO 26262 等功能安全标准。
IDE、配置、编译器或调试器

SAFETI_CQKIT — 安全编译器资质审核套件

为帮助客户验证 TI ARM、C6000、C7000 或 C2000/CLA C/C++ 编译器符合 IEC 61508 和 ISO 26262 等功能安全标准,我们开发了 SafeTI 编译器资质审核套件。

SafeTI 编译器资质审核套件:

  • 面向 TI 客户免费提供
  • 无需用户运行资质审核测试
  • 支持编译器覆盖范围分析*
    • * 可从每个 QKIT 下载页面下载覆盖数据收集说明。
  • 不包括 Validas 咨询

要获取 SafeTI 编译器资质审核套件,请点击上方相应的申请按钮。

请访问 (...)

操作系统 (OS)

WHIS-3P-MCURTOS — WITTENSTEIN high integrity systems MCU SafeRTOS 和 OpenRTOS

WITTENSTEIN high integrity systems 是一家 RTOS 公司,致力于为医疗、汽车、航天和工业领域生产和提供实时操作系统和软件组件。WITTENSTEIN 的产品支持 TI 的 Hercules™ Arm® Cortex®-R MCU,适用于功能安全(RM48x、TMS570 和 TMS470M)、C2000™ 32 位微控制器和 Arm Cortex-M3 Concerto 系列。

如需了解有关 WITTENSTEIN high integrity systems 的更多信息,请访问: (...)
由 WITTENSTEIN High Integrity Systems 提供
软件编程工具

NOWECC — ECC 生成工具

Hercules 微处理器系列具有检测和校正存储器故障的功能(电路的嵌入式闪存模块也含有该功能)。此单位纠错和双位纠错电路 (SECDED) 要求每 64 位数据具有 8 个纠错检查位。

nowECCTM 的用途是生成嵌入式 SECDED 所需的 ECC 检查位,以便识别并校正存储器故障。

nowECCTM 是一种命令行工具,它在 Windows PC 上以 32 位模式运行。
软件编程工具

UNIFLASH — UniFlash stand-alone flash tool for microcontrollers, Sitara™ processors and SimpleLink™ family

支持的器件:CC13xx、CC25xx、CC26xx、CC3x20、CC3x30、CC3x35、Tiva、C2000、MSP43x、Hercules、PGA9xx、IWR12xx、IWR14xx、IWR16xx、IWR18xx、IWR68xx、AWR12xx、AWR14xx、AWR16xx、AWR18xx。  仅限命令行:AM335x、AM437x、AM571x、AM572x、AM574x、AM65XX、K2G

CCS Uniflash 是一个独立工具,用于编程 TI MCU 的片上闪存内存和 Sitara 处理器的板载闪存内存。Uniflash 具有 GUI、命令行和脚本接口。CCS (...)

仿真模型

TMS570LS12x7 PGE BSDL Model

SPNM030.ZIP (11 KB) - BSDL Model
仿真模型

TMS570LS12x ZWT BSDL Model

SPNM031.ZIP (11 KB) - BSDL Model
计算工具

FMZPLL_CALCULATOR — FMzPLL 配置工具

FMzPLL 计算器可以帮助用户在 TMS570 微处理器上配置 FMzPLL。它允许用户输入:
  • OSCIN 速度
  • 乘法器设置
  • 除法器设置
  • 调频设置
  • PLL/OSC 故障选项
在用户配置所需的选项之后,计算器将显示 PLL 输出速度以及相应的 PLLCTL1 和 PLLCTL2 寄存器设置。

此工具还包含反向计算器模式,即当您为 PLLCTL1 和 PLLCTL2 输入值时,它将显示所有 PLL 选项。
原理图

TMS570LS12x and RM46x LaunchPad Schematic

SPRR399.PDF (93 KB)
光绘文件

TMS570LS12x and RM46x LaunchPad Gerber Files

SPRCAI7.ZIP (471 KB)
PCB 布局

TMS570LS12x and RM46x LaunchPad PCB Layout

SPRR400.ZIP (393 KB)
参考设计

TIDM-02009 — 经过 ASIL D 等级功能安全认证的高速牵引和双向直流/直流转换参考设计

此参考设计演示了如何通过一个 TMS320F28388D 实时 C2000™ MCU 控制 HEV/EV 牵引逆变器和双向直流/直流转换器。牵引控制利用基于软件的旋转变压器转数字转换器 (RDC),使电机转速高达 20,000RPM。直流/直流转换器结合了峰值电流模式控制 (PCMC) 技术、相移全桥 (PSFB) 拓扑以及同步整流 (SR) 机制。牵引逆变器级采用碳化硅 (SiC) 功率级,由 UCC5870-Q1 智能栅极驱动器驱动。利用比较器子系统 (CMPSS) 中先进的 PWM 模块和内置斜坡补偿功能,可生成 PCMC 波形。该系统基于 ASIL (...)
封装 引脚 下载
LQFP (PGE) 144 了解详情
NFBGA (ZWT) 337 了解详情

订购与质量

包含信息:
  • RoHS
  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/FIT 估算
  • 材料成分
  • 认证摘要
  • 持续可靠性监测

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支持与培训

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