產品詳細資料

Resolution (Bits) 12 Sample rate (max) (ksps) 1000 Number of input channels 1 Interface type SPI Architecture SAR Input type Single-ended Rating Catalog Reference mode Supply Input voltage range (max) (V) 3.6 Input voltage range (min) (V) 0 Features Small Size Operating temperature range (°C) -40 to 125 Power consumption (typ) (mW) 0.234 Analog supply voltage (min) (V) 1.65 Analog supply voltage (max) (V) 3.6 SNR (dB) 70 Digital supply (min) (V) 1.65 Digital supply (max) (V) 3.6
Resolution (Bits) 12 Sample rate (max) (ksps) 1000 Number of input channels 1 Interface type SPI Architecture SAR Input type Single-ended Rating Catalog Reference mode Supply Input voltage range (max) (V) 3.6 Input voltage range (min) (V) 0 Features Small Size Operating temperature range (°C) -40 to 125 Power consumption (typ) (mW) 0.234 Analog supply voltage (min) (V) 1.65 Analog supply voltage (max) (V) 3.6 SNR (dB) 70 Digital supply (min) (V) 1.65 Digital supply (max) (V) 3.6
VSSOP (DCU) 8 6.2 mm² 2 x 3.1 X2QFN (RUG) 8 2.25 mm² 1.5 x 1.5
  • Industry’s First SAR ADC with Nanowatt Power Consumption:
    • 234 µW at 1 MSPS with 1.8-V AVDD
    • 690 µW at 1 MSPS with 3-V AVDD
    • 69 µW at 100 kSPS with 3-V AVDD
    • Less than 1 µW at 1 kSPS with 3-V AVDD
  • Industry’s Smallest SAR ADC:
    • X2QFN-8 Package with 2.25-mm2 Footprint
  • 1-MSPS Throughput with Zero Data Latency
  • Wide Operating Range:
    • AVDD: 1.65 V to 3.6 V
    • DVDD: 1.65 V to 3.6 V (Independent of AVDD)
    • Temperature Range: –40°C to 125°C
  • Excellent Performance:
    • 12-Bit Resolution with NMC
    • ±1-LSB (Max) DNL and INL
    • 70-dB SNR with 3-V AVDD
    • –80-dB THD with 3-V AVDD
  • Unipolar Input Range: 0 V to AVDD
  • Integrated Offset Calibration
  • SPI™-Compatible Serial Interface: 16 MHz
  • JESD8-7A Compliant Digital I/O
  • Industry’s First SAR ADC with Nanowatt Power Consumption:
    • 234 µW at 1 MSPS with 1.8-V AVDD
    • 690 µW at 1 MSPS with 3-V AVDD
    • 69 µW at 100 kSPS with 3-V AVDD
    • Less than 1 µW at 1 kSPS with 3-V AVDD
  • Industry’s Smallest SAR ADC:
    • X2QFN-8 Package with 2.25-mm2 Footprint
  • 1-MSPS Throughput with Zero Data Latency
  • Wide Operating Range:
    • AVDD: 1.65 V to 3.6 V
    • DVDD: 1.65 V to 3.6 V (Independent of AVDD)
    • Temperature Range: –40°C to 125°C
  • Excellent Performance:
    • 12-Bit Resolution with NMC
    • ±1-LSB (Max) DNL and INL
    • 70-dB SNR with 3-V AVDD
    • –80-dB THD with 3-V AVDD
  • Unipolar Input Range: 0 V to AVDD
  • Integrated Offset Calibration
  • SPI™-Compatible Serial Interface: 16 MHz
  • JESD8-7A Compliant Digital I/O

The ADS7042 is a 12-bit, 1-MSPS, analog-to-digital converter (ADC). The device supports a wide analog input voltage range (1.65 V to 3.6 V) and includes a capacitor-based, successive-approximation register (SAR) ADC with an inherent sample-and-hold circuit. The SPI-compatible serial interface is controlled by the CS and SCLK signals. The input signal is sampled with the CS falling edge and SCLK is used for conversion and serial data output. The device supports a wide digital supply range (1.65 V to 3.6 V), enabling direct interface to a variety of host controllers. The ADS7042 complies with the JESD8-7A standard for normal DVDD range (1.65 V to 1.95 V).

The ADS7042 is available in 8-pin, miniature, leaded, and X2QFN packages and is specified for operation from –40°C to 125°C. Miniature form-factor and extremely low-power consumption make this device suitable for space-constrained, battery-powered applications.

The ADS7042 is a 12-bit, 1-MSPS, analog-to-digital converter (ADC). The device supports a wide analog input voltage range (1.65 V to 3.6 V) and includes a capacitor-based, successive-approximation register (SAR) ADC with an inherent sample-and-hold circuit. The SPI-compatible serial interface is controlled by the CS and SCLK signals. The input signal is sampled with the CS falling edge and SCLK is used for conversion and serial data output. The device supports a wide digital supply range (1.65 V to 3.6 V), enabling direct interface to a variety of host controllers. The ADS7042 complies with the JESD8-7A standard for normal DVDD range (1.65 V to 1.95 V).

The ADS7042 is available in 8-pin, miniature, leaded, and X2QFN packages and is specified for operation from –40°C to 125°C. Miniature form-factor and extremely low-power consumption make this device suitable for space-constrained, battery-powered applications.

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重要文件 類型 標題 格式選項 日期
* Data sheet ADS7042 Ultra-Low Power, Ultra-Small Size, 12-Bit, 1-MSPS, SAR ADC datasheet (Rev. C) PDF | HTML 2015年 12月 10日
Product overview Precision ADCs for Motor Encoders and Position Sensing (Rev. A) PDF | HTML 2025年 10月 28日
Analog Design Journal Low-power sensor measurements: 3.3-V, 1-ksps, 12-bit, single-ended, single-suppl (Rev. B) PDF | HTML 2024年 9月 26日
Circuit design Driving a SAR ADC directly without a front-end buffer circuit (Rev. B) PDF | HTML 2024年 9月 23日
Circuit design High-side current shunt monitor circuit to 3-V single-ended ADC (Rev. A) PDF | HTML 2024年 9月 20日
Circuit design Low-power sensor measurements: 3.3-V, 1-ksps, 12-bit, single-ended, dual-supply (Rev. B) PDF | HTML 2024年 9月 17日
Technical article Accurately measure vital signs with low Iq and a small form factor (Rev. B) PDF | HTML 2024年 4月 18日
Technical article How tiny data converters give you more value per square PDF | HTML 2019年 12月 11日
Circuit design Monitoring NTC Thermistor Circuit With Single-Ended ADC (Rev. A) PDF | HTML 2019年 6月 27日
Application brief Optimized Sensor Measurement: Driving a SAR ADC Input Without a Driver Amplifier 2017年 9月 1日
Application note Low-Cost, Low-Power, Small 14-bit AFE: Interleaved ADCs Scalable up to 7.5 MSPS 2017年 5月 26日
User guide BOOST-ADS7042 BoosterPack™ Plug-In Module 2016年 6月 8日
User guide BOOST-ADS7042 Getting Started Guide 2016年 4月 21日
User guide BOOST-ADS7042 Quick Start Guide 2016年 3月 16日
More literature SAR ADCs for PLC Applications 2016年 2月 11日
Design guide Software Pacemaker Detection Design Guide 2015年 12月 3日
E-book Best of Baker's Best: Precision Data Converters -- SAR ADCs 2015年 5月 21日

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開發板

ADS7042EVM-PDK — ADS7042 超低功耗超小型 12 位元 1 MSPS SAR ADC 性能展示套件 (PDK)

The ADS7042 evaluation module (EVM) performance demonstration kit (PDK) is a platform for evaluating the 12-bit, ADS7042 successive approximation register (SAR) analog-to-digital converter (ADC).

The PDK includes the ADS7042 evaluation board, precision host interface (PHI) controller board, and (...)

使用指南: PDF | HTML
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開發板

BOOST-ADS7042 — ADS7042 超低功耗資料採集 BoosterPack

ADS7042 超低功率資料擷取 BoosterPack 是一套獨立式系統,採用 TI ADS7042 漸近法暫存器類比轉數位轉換器,將類比感測器資料轉換為數位 SPI 資料。  此 BoosterPack 的設計可和 TI LaunchPad™ 生態系統相容,透過板載環境光感測器或 SMA 輸入插孔,從類比感測器輸入實現完整的資料擷取系統,並藉由 LaunchPad 上的 USB 連接埠透過 UART 進行數位資料輸出。  下方「立即訂購」一節中會列出。  如需有關完整精準的 SAR ADC 產品組合詳細資訊,請造訪:www.ti.com/precisionadc

如需採用 ADS7042 (...)

使用指南: PDF
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開發板

PLABS-SAR-EVM-PDK — TI Precision Labs SAR ADC 評估模組性能展示套件 (PDK)

PLABS-SAR-EVM-PDK 是一款實驗平台,需與 TI Precision Labs 影片配合使用,可幫助深入理解 漸近法暫存器 (SAR) 類比轉數位轉換器 (ADC) 電路。此評估模組 (EVM) 平台包含兩個通道的常見 SAR ADC 電路,可輕鬆連接至精密訊號注入器評估模組 (PSIEVM),該模組能提供低失真、低雜訊的輸入訊號來驅動 SAR ADC;第三個通道則設計用於展示超低功耗 ADC 在不同吞吐量下的功耗變化。該 EVM 平台還包含 10 塊可安裝於主機板上的試樣卡,用於展示不同前端驅動電路對性能的影響。

PLABS-SAR-EVM-PDK 使用者指南提供了 EVM (...)

使用指南: PDF
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SBAC178 Source Files for SBAA256

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SBAC230 Source files for SBAA340

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模擬型號

ADS7042 IBIS Model

SBAM196.ZIP (26 KB) - IBIS Model
模擬型號

ADS7042 TINA-TI Transient Spice Model

SBAM195.ZIP (83 KB) - TINA-TI Spice Model
模擬型號

Low Power Sensor Measurements: 3.3V, 1 kSPS, Tina Files (Rev. A)

SBAM341A.ZIP (48 KB) - TINA-TI Spice Model
模擬型號

Low-Power Sensor Measurements Dual Supply Tina File

SBAM342.ZIP (49 KB) - TINA-TI Spice Model
計算工具

ANALOG-ENGINEER-CALC PC software analog engineer's calculator

The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)

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設計工具

ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.

The ADC-TO-VREF-SELECT tool enables the pairing of TI analog-to-digital converters (ADCs) and series voltage references. Users can select an ADC device and the desired reference voltage, and the tool will list up to two voltage reference recommendations.
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配置圖

TIPD197 Design File

TIDCAP1.ZIP (795 KB)
模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI 是有助於評估類比電路功能的設計和模擬環境。這款全功能設計和模擬套件使用 Cadence® 的類比分析引擎。PSpice for TI 包括業界最大的模型庫之一,涵蓋我們的類比和電源產品組合,以及特定類比行為模型,且使用無需支付費用。

PSpice for TI 設計和模擬環境可讓您使用其內建函式庫來模擬複雜的混合訊號設計。在進行佈局和製造之前,建立完整的終端設備設計和解決方案原型,進而縮短上市時間並降低開發成本。 

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模擬工具

TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
參考設計

TIPD197 — ECG 中的軟體心律調節器偵測參考設計

This circuit is designed to condition and digitize an electrocardiogram signal output from the integrated PACE_OUT buffer on the ADS129x to detect artifacts of an artificial pacemaker. This circuit includes an op amp which serves as a signal conditioner and input driver for a fast-sampling SAR ADC.
Design guide: PDF
電路圖: PDF
參考設計

TIPD168 — 針對低功耗和超小體積進行最佳化的三種 12 位元資料採集參考設計

This Verified Precision Design details the design procedure, simulated results, and showcases the actual performance of a 12-bit discrete data acquisition block using the ADS7042, optimized for extremely low power, small form factor applications for the following three different optimizations: 

(...)

使用指南: PDF
電路圖: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
VSSOP (DCU) 8 Ultra Librarian
X2QFN (RUG) 8 Ultra Librarian

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  • 認證摘要
  • 進行中的可靠性監測
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  • 晶圓廠位置
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