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數據轉換器
數位轉類比轉換器 (DAC)
精密 DAC (≤10 MSPS)

DAC121S101QML-SP

現行

Radiation-hardened, QML-V, 12 bit, Micro Power Digital-to-Analog Converter with Rail-to-Rail Output

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產品規格表

DAC121S101QML-SP

現行
產品規格表 立即訂購

產品詳細資料

Resolution (Bits) 12 Number of DAC channels 1 Interface type SPI Output type Buffered Voltage Output voltage range (V) 0 to 5.5 INL (max) (±LSB) 8 Settling time (µs) 12.5 Reference type Ext Architecture String Rating Space Features Low Power Sample/update rate (Msps) 1.8 Power consumption (typ) (mW) 0.52 Operating temperature range (°C) -55 to 125 Product type Data Converters
Resolution (Bits) 12 Number of DAC channels 1 Interface type SPI Output type Buffered Voltage Output voltage range (V) 0 to 5.5 INL (max) (±LSB) 8 Settling time (µs) 12.5 Reference type Ext Architecture String Rating Space Features Low Power Sample/update rate (Msps) 1.8 Power consumption (typ) (mW) 0.52 Operating temperature range (°C) -55 to 125 Product type Data Converters
CFP (NAC) 10 62.9285 mm² (— mm × — mm) DIESALE (Y) — See data sheet
  • 5962R07726
    • Total Ionizing Dose 100 krad(Si)
    • Single Event Latch-up Immune 120 MeV-cm2/mg
    • Single Event Functional Interrupt Immune 120 MeV-cm2/mg (See Radiation Report)
  • Ensured Monotonicity
  • Low Power Operation
  • Rail-to-Rail Voltage Output
  • Power-On Reset to Zero Volts Output
  • SYNC Interrupt Facility
  • Wide Power Supply Range (2.7 V to 5.5 V)
  • Small Packages
  • Power-Down Feature
  • Key Specifications
    • Resolution: 12 Bits
    • DNL: +0.21, –0.10 LSB (Typical)
    • Output Settling Time: 12.5 µs (Typical)
    • Zero Code Error: 2.1 mV (Typical)
    • Full-Scale Error: –0.04% FS (Typical)
    • Power Dissipation
      • Normal Mode: 0.52 mW (3.6 V) and 1.19 mW (5.5 V) Typical
      • Power-Down Mode: 0.014 µW (3.6 V) and 0.033 µW (5.5 V) Typical
  • 5962R07726
    • Total Ionizing Dose 100 krad(Si)
    • Single Event Latch-up Immune 120 MeV-cm2/mg
    • Single Event Functional Interrupt Immune 120 MeV-cm2/mg (See Radiation Report)
  • Ensured Monotonicity
  • Low Power Operation
  • Rail-to-Rail Voltage Output
  • Power-On Reset to Zero Volts Output
  • SYNC Interrupt Facility
  • Wide Power Supply Range (2.7 V to 5.5 V)
  • Small Packages
  • Power-Down Feature
  • Key Specifications
    • Resolution: 12 Bits
    • DNL: +0.21, –0.10 LSB (Typical)
    • Output Settling Time: 12.5 µs (Typical)
    • Zero Code Error: 2.1 mV (Typical)
    • Full-Scale Error: –0.04% FS (Typical)
    • Power Dissipation
      • Normal Mode: 0.52 mW (3.6 V) and 1.19 mW (5.5 V) Typical
      • Power-Down Mode: 0.014 µW (3.6 V) and 0.033 µW (5.5 V) Typical

The DAC121S101QML-SP device is a full-featured, general-purpose, 12-bit voltage-output digital-to-analog converter (DAC) that can operate from a single 2.7-V to 5.5-V supply and consumes just 177 µA of current at 3.6 V. The on-chip output amplifier allows rail-to-rail output swing and the three-wire serial interface operates at clock rates up to 20 MHz over the specified supply voltage range and is compatible with standard SPI, QSPI, MICROWIRE, and DSP interfaces.

The supply voltage for the DAC121S101QML-SP serves as its voltage reference, providing the widest possible output dynamic range. A power-on reset circuit ensures that the DAC output powers up to zero volts and remains there until there is a valid write to the device. A power-down feature reduces power consumption to less than a microWatt.

The low power consumption and small packages of the DAC121S101QML-SP make it an excellent choice for use in battery-operated equipment.

The DAC121S101QML-SP device is a full-featured, general-purpose, 12-bit voltage-output digital-to-analog converter (DAC) that can operate from a single 2.7-V to 5.5-V supply and consumes just 177 µA of current at 3.6 V. The on-chip output amplifier allows rail-to-rail output swing and the three-wire serial interface operates at clock rates up to 20 MHz over the specified supply voltage range and is compatible with standard SPI, QSPI, MICROWIRE, and DSP interfaces.

The supply voltage for the DAC121S101QML-SP serves as its voltage reference, providing the widest possible output dynamic range. A power-on reset circuit ensures that the DAC output powers up to zero volts and remains there until there is a valid write to the device. A power-down feature reduces power consumption to less than a microWatt.

The low power consumption and small packages of the DAC121S101QML-SP make it an excellent choice for use in battery-operated equipment.
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技術文件

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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 DAC121S101QML-SP Radiation Hardened 12-Bit Micro Power Digital-to-Analog Converter With Rail-to-Rail Output datasheet (Rev. F) PDF | HTML 2016/7/29
* 輻射及可靠性報告 DAC121S101QML TID Report 2012/5/9
* 輻射及可靠性報告 DAC121S101WGRQV SET Analysis Paper 2012/5/9
* 輻射及可靠性報告 DAC121S101WGRQV SEE Report 2012/5/7
* 輻射及可靠性報告 Analysis of Low Dose Rate Effects on Parasitic Bipolar Structures in CMOS Proces 2012/5/4
* SMD DAC121S101QML-SP SMD 5962R0722602VZA 2016/6/21
選擇指南 TI Space Products (Rev. L) 2026/3/27
Application brief Space Grade 12A Laser Diode Driver PDF | HTML 2026/2/17
Application brief DLA Approved Optimizations for QML Products (Rev. C) PDF | HTML 2025/6/17
應用說明 Heavy Ion Orbital Environment Single-Event Effects Estimations (Rev. B) PDF | HTML 2025/6/10
更多文件說明 TI Engineering Evaluation Units vs. MIL-PRF-38535 QML Class V Processing (Rev. B) 2025/2/20
應用說明 Single-Event Effects Confidence Interval Calculations (Rev. A) PDF | HTML 2022/10/19
Application brief Space-Grade, 100-krad, Voltage-Controlled Current Sink (0–200 mA) Circuit PDF | HTML 2021/6/30
Application brief Space-Grade, 100-krad, Programmable Voltage Source Circuit With Remote Sense FB PDF | HTML 2021/6/7
Application brief Space-Grade, 100-krad, Programmable Negative Voltage Source (–5 to 0 V) Circuit PDF | HTML 2021/6/7
技術文章 Satellite state of health: how space-grade ICs are improving telemetry circuit des PDF | HTML 2021/1/26
電子書 Radiation Handbook for Electronics (Rev. A) 2019/5/21
應用說明 AN-2001 Daisy Chaining Precision DACs (Rev. A) 2013/5/1
使用指南 DAC121S101CVAL 12-Bit Micro Power DAC with Rail-to-Rail Output User Guide 2012/2/23

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ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL — The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.

The ADC-TO-VREF-SELECT tool enables the pairing of TI analog-to-digital converters (ADCs) and series voltage references. Users can select an ADC device and the desired reference voltage, and the tool will list up to two voltage reference recommendations.
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參考設計

TIDA-010197 — 精確度 < 1% 的多用途衛星健康監控與控制平台參考設計

此參考設計具備適用抗輻射衛星遙測系統的高度模組化設計，利用 LMP7704-SP 的多元用途來準確監控溫度、電壓和電流，藉此為主機板提供回饋。此外也提供受控類比輸出，以提供保護及最佳效率。多數空間應用需在衛星多個子系統中監測這三個關鍵可測量值。
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封裝 針腳 CAD 符號、佔位空間與 3D 模型
CFP (NAC) 10 Ultra Librarian
DIESALE (Y) — Ultra Librarian
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