產品詳細資料

Resolution (Bits) 24 Sample rate (max) (ksps) 1000 Number of input channels 16 Interface type SPI Architecture Delta-Sigma Input type Differential, Single-ended Multichannel configuration Multiplexed Rating Catalog Reference mode External, Internal Input voltage range (max) (V) 20 Input voltage range (min) (V) 0 Features 50/60 Hz Rejection, Daisy-Chainable, GPIO, Oscillator, Small Size, Temp. Sensor Operating temperature range (°C) -40 to 125 Power consumption (typ) (mW) 24 Analog supply voltage (min) (V) 3 Analog supply voltage (max) (V) 5.25 Digital supply (min) (V) 1.65 Digital supply (max) (V) 5.5
Resolution (Bits) 24 Sample rate (max) (ksps) 1000 Number of input channels 16 Interface type SPI Architecture Delta-Sigma Input type Differential, Single-ended Multichannel configuration Multiplexed Rating Catalog Reference mode External, Internal Input voltage range (max) (V) 20 Input voltage range (min) (V) 0 Features 50/60 Hz Rejection, Daisy-Chainable, GPIO, Oscillator, Small Size, Temp. Sensor Operating temperature range (°C) -40 to 125 Power consumption (typ) (mW) 24 Analog supply voltage (min) (V) 3 Analog supply voltage (max) (V) 5.25 Digital supply (min) (V) 1.65 Digital supply (max) (V) 5.5
VQFN (RHB) 36 25 mm² 5 x 5
  • Programmable data rate up to 1.067MSPS
  • High impedance voltage divider with integrated precision matched resistors
  • Analog multiplexer with 17 independently selectable inputs:
    • Up to 8 fully differential inputs
    • Up to 16 single ended inputs
  • Rail-to-rail analog input buffer and reference buffer
  • Internal voltage reference, selectable output 2.5V or 4.096V
  • Fault detection and monitor circuits
  • General-Purpose I/Os
  • Internal Oscillator: 25.6MHz, 1% Accuracy
  • Channel auto-sequencer and FIFO buffer
  • Simultaneous 50Hz and 60Hz rejection at ≤ 25 SPS with low-latency digital filter
  • Power-scalable architecture with four speed modes
  • Programmable data rate up to 1.067MSPS
  • High impedance voltage divider with integrated precision matched resistors
  • Analog multiplexer with 17 independently selectable inputs:
    • Up to 8 fully differential inputs
    • Up to 16 single ended inputs
  • Rail-to-rail analog input buffer and reference buffer
  • Internal voltage reference, selectable output 2.5V or 4.096V
  • Fault detection and monitor circuits
  • General-Purpose I/Os
  • Internal Oscillator: 25.6MHz, 1% Accuracy
  • Channel auto-sequencer and FIFO buffer
  • Simultaneous 50Hz and 60Hz rejection at ≤ 25 SPS with low-latency digital filter
  • Power-scalable architecture with four speed modes

The ADS125H18 is a high voltage input, multiplexed 8/16-Channel, 24 bit, delta-sigma (ΔΣ), analog-to-digital converter (ADC) with data rates up to 1MSPS and is configurable to accept up to 8 fully differential analog inputs or up to 16 single-ended analog inputs. Each input comprises a high-impedance voltage divider with integrated precision matched resistors to scale down the input voltage to the input range of the ADC. The device offers an excellent combination of ac performance and dc precision with low power consumption.

The ADS125H18 is equipped with a channel auto-sequencer and a FIFO (first-in, first-out) buffer. The power-scalable architecture provides four speed modes to optimize data rate, resolution, and power consumption.

The small 5mm × 5mm VQFN package is designed for limited space applications. The device is fully specified for operation over the –40°C to +125°C temperature range.

The ADS125H18 is a high voltage input, multiplexed 8/16-Channel, 24 bit, delta-sigma (ΔΣ), analog-to-digital converter (ADC) with data rates up to 1MSPS and is configurable to accept up to 8 fully differential analog inputs or up to 16 single-ended analog inputs. Each input comprises a high-impedance voltage divider with integrated precision matched resistors to scale down the input voltage to the input range of the ADC. The device offers an excellent combination of ac performance and dc precision with low power consumption.

The ADS125H18 is equipped with a channel auto-sequencer and a FIFO (first-in, first-out) buffer. The power-scalable architecture provides four speed modes to optimize data rate, resolution, and power consumption.

The small 5mm × 5mm VQFN package is designed for limited space applications. The device is fully specified for operation over the –40°C to +125°C temperature range.

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重要文件 類型 標題 格式選項 日期
* Data sheet ADS125H18 8/16-Channel, 1MSPS , 24 -Bit, Delta-Sigma ADC datasheet PDF | HTML 2025年 12月 16日
Circuit design 來自 +5V 供電電源且用於高電壓資料轉換器的精密、±15V 電 源供應電路 PDF | HTML 2025年 12月 9日
Circuit design 4-Ch, diff. in., DAQ front-end circuit w/ configurable voltage & current inputs (Rev. A) PDF | HTML 2024年 9月 19日
Application note Calculating Conversion Latency and System Cycle Time for Delta-Sigma ADCs (Rev. A) PDF | HTML 2024年 3月 18日
Application note Digital Filter Types in Delta-Sigma ADCs (Rev. A) PDF | HTML 2023年 3月 29日
Product overview PLC Analog Input Front-End Architectures PDF | HTML 2022年 7月 31日
E-book Fundamentals of Precision ADC Noise Analysis (Rev. A) 2020年 6月 19日

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ADS125H18EVM-PDK — ADS125H18 評估模組

ADS125H18 評估模組 (EVM) 是專為評估 ADS125H18 效能而設計的平台。ADS125H18 為一款 24 位元、8 通道多工處理的 delta-sigma (ΔΣ) 類比數位轉換器 (ADC),其設計可直接量測過程層級(10V 及 4mA 至 20mA)輸入。ADS125H18 提供高達 1MSPS 的取樣率、彈性化序列控制器、低雜訊電壓參考,以及多種診斷功能,有助於實現高可靠性系統設計。ADS125H18EVM-PDK 透過通用序列匯流排 (USB) 介面簡化了對硬體、軟體和電腦連線能力的裝置評估。
使用指南: PDF | HTML
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ADS125H18-MSPM0-EXAMPLE-CODE ADS125H18 C Example Code

Start developing your embedded solution with example code for the ADS125H18 using an MSPM0 Launchpad
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ANALOG-ENGINEER-CALC PC software analog engineer's calculator

The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)

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PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI 是有助於評估類比電路功能的設計和模擬環境。這款全功能設計和模擬套件使用 Cadence® 的類比分析引擎。PSpice for TI 包括業界最大的模型庫之一,涵蓋我們的類比和電源產品組合,以及特定類比行為模型,且使用無需支付費用。

PSpice for TI 設計和模擬環境可讓您使用其內建函式庫來模擬複雜的混合訊號設計。在進行佈局和製造之前,建立完整的終端設備設計和解決方案原型,進而縮短上市時間並降低開發成本。 

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TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
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VQFN (RHB) 36 Ultra Librarian

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