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類比轉數位轉換器 (ADC)
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ADS7056

現行

具有 SPI 的 14 位元 2.5-MSPS 超低功耗超小型 SAR ADC

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產品規格表

ADS7056

現行
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產品詳細資料

Resolution (Bits) 14 Sample rate (max) (ksps) 2500 Number of input channels 1 Interface type SPI Architecture SAR Input type Single-ended Rating Catalog Reference mode Supply Input voltage range (max) (V) 3.6 Input voltage range (min) (V) 0 Features Small Size Operating temperature range (°C) -40 to 125 Power consumption (typ) (mW) 3.5 Analog supply voltage (min) (V) 2.35 Analog supply voltage (max) (V) 3.6 SNR (dB) 74.9 Digital supply (min) (V) 1.65 Digital supply (max) (V) 3.6
Resolution (Bits) 14 Sample rate (max) (ksps) 2500 Number of input channels 1 Interface type SPI Architecture SAR Input type Single-ended Rating Catalog Reference mode Supply Input voltage range (max) (V) 3.6 Input voltage range (min) (V) 0 Features Small Size Operating temperature range (°C) -40 to 125 Power consumption (typ) (mW) 3.5 Analog supply voltage (min) (V) 2.35 Analog supply voltage (max) (V) 3.6 SNR (dB) 74.9 Digital supply (min) (V) 1.65 Digital supply (max) (V) 3.6
X2QFN (RUG) 8 2.25 mm² (1.5 mm × 1.5 mm)
  • 2.5-MSPS Throughput
  • Ultra-Small Size SAR ADC:
    • X2QFN-8 Package with 2.25-mm2 Footprint
  • Wide Operating Range:
    • AVDD: 2.35 V to 3.6 V
    • DVDD: 1.65 V to 3.6 V (Independent of AVDD)
    • Temperature Range: –40°C to +125°C
  • Unipolar Input Range: 0 V to AVDD
  • Excellent Performance:
    • 14-Bit NMC DNL, ±2-LSB INL
    • 74.5-dB SINAD at 2-kHz
    • 73.7-dB SINAD at 1-MHz
  • Ultra-Low Power Consumption:
    • 3.5 mW at 2.5-MSPS with 3.3-V AVDD
    • 158 µW at 100-kSPS with 3.3-V AVDD
  • Integrated Offset Calibration
  • SPI-Compatible Serial Interface: 60-MHz
  • JESD8-7A Compliant Digital I/O
  • 2.5-MSPS Throughput
  • Ultra-Small Size SAR ADC:
    • X2QFN-8 Package with 2.25-mm2 Footprint
  • Wide Operating Range:
    • AVDD: 2.35 V to 3.6 V
    • DVDD: 1.65 V to 3.6 V (Independent of AVDD)
    • Temperature Range: –40°C to +125°C
  • Unipolar Input Range: 0 V to AVDD
  • Excellent Performance:
    • 14-Bit NMC DNL, ±2-LSB INL
    • 74.5-dB SINAD at 2-kHz
    • 73.7-dB SINAD at 1-MHz
  • Ultra-Low Power Consumption:
    • 3.5 mW at 2.5-MSPS with 3.3-V AVDD
    • 158 µW at 100-kSPS with 3.3-V AVDD
  • Integrated Offset Calibration
  • SPI-Compatible Serial Interface: 60-MHz
  • JESD8-7A Compliant Digital I/O

The ADS7056 is a 14-bit, 2.5-MSPS, analog-to-digital converter (ADC). The device includes a capacitor-based, successive-approximation register (SAR) ADC that supports a wide analog input voltage range (0 V to AVDD, for AVDD in the range of 2.35 V to 3.6 V).

The SPI-compatible serial interface is controlled by the CS and SCLK signals. The input signal is sampled with the CS falling edge and SCLK is used for conversion and serial data output. The device supports a wide digital supply range (1.65 V to 3.6 V), enabling direct interfacing to a variety of host controllers. The ADS7056 complies with the JESD8-7A standard for a normal DVDD range (1.65 V to 1.95 V).

The ADS7056 is available in an 8-pin, miniature, X2QFN package and is specified over the extended industrial temperature range (–40°C to +125°C). Miniature form-factor and extremely low-power consumption make this device suitable for space-constrained and battery-powered applications.

The ADS7056 is a 14-bit, 2.5-MSPS, analog-to-digital converter (ADC). The device includes a capacitor-based, successive-approximation register (SAR) ADC that supports a wide analog input voltage range (0 V to AVDD, for AVDD in the range of 2.35 V to 3.6 V).

The SPI-compatible serial interface is controlled by the CS and SCLK signals. The input signal is sampled with the CS falling edge and SCLK is used for conversion and serial data output. The device supports a wide digital supply range (1.65 V to 3.6 V), enabling direct interfacing to a variety of host controllers. The ADS7056 complies with the JESD8-7A standard for a normal DVDD range (1.65 V to 1.95 V).

The ADS7056 is available in an 8-pin, miniature, X2QFN package and is specified over the extended industrial temperature range (–40°C to +125°C). Miniature form-factor and extremely low-power consumption make this device suitable for space-constrained and battery-powered applications.
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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 ADS7056 Ultra-Low Power, Ultra-Small Size, 14-Bit, High-Speed SAR ADC datasheet PDF | HTML 2017/3/30
Product overview Precision ADCs for Motor Encoders and Position Sensing (Rev. A) PDF | HTML 2025/10/28
類比設計期刊 Low-power sensor measurements: 3.3-V, 1-ksps, 12-bit, single-ended, single-suppl (Rev. B) PDF | HTML 2024/9/26
Circuit design Driving a SAR ADC directly without a front-end buffer circuit (Rev. B) PDF | HTML 2024/9/23
Circuit design High-side current shunt monitor circuit to 3-V single-ended ADC (Rev. A) PDF | HTML 2024/9/20
Circuit design Driving a low-voltage single-ended SAR ADC circuit with high-voltage input (Rev. A) PDF | HTML 2024/9/19
Circuit design Low-power sensor measurements: 3.3-V, 1-ksps, 12-bit, single-ended, dual-supply (Rev. B) PDF | HTML 2024/9/17
Application brief Improving Response Time and Accuracy in Autonomous Robots With Wideband SAR-ADCs 2018/10/3
類比設計期刊 Using interleaving with SAR ADCs for lower power, smaller size and lower cost 2017/10/24
Application brief Optimized Sensor Measurement: Driving a SAR ADC Input Without a Driver Amplifier PDF | HTML 2017/9/1
應用說明 Low-Cost, Low-Power, Small 14-bit AFE: Interleaved ADCs Scalable up to 7.5 MSPS 2017/5/26

設計與開發

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開發板

ADS7057EVM-PDK — ADS7057 14 位元 2.5MSPS 小型低功耗 SAR ADC 性能展示套件 (PDK)

ADS7057 評估模組 (EVM) 性能示範套件 (PDK) 是用於評估 14 位元、ADS7057 漸近法暫存器 (SAR) 類比轉數位轉換器 (ADC) 的平台。

PDK 內含 ADS7057 評估板、精密主機介面 (PHI) 控制器電路板，以及隨附的電腦軟體，可讓使用者透過通用序列匯流排 (USB) 與 ADC 通訊、擷取資料，以及執行資料分析。

使用指南: PDF | HTML
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支援軟體

SBAC248 — Source Files for SBAA371

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模擬型號

ADS7056 IBIS Model

SBAM317.ZIP (27 KB) - IBIS 模型
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模擬型號

ADS7056 TINA-TI Reference Design

SBAM318.TSC (290 KB) - TINA-TI 參考設計
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模擬型號

ADS7056 TINA-TI Transient Spice Model

SBAM316.ZIP (68 KB) - TINA-TI Spice 模型
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計算工具

ANALOG-ENGINEER-CALC — PC software analog engineer's calculator

類比工程師的計算機旨在加速類比電路設計工程師定期使用的許多重複計算。此基於 PC 的工具提供圖形介面，列出各種常見計算，從使用回饋電阻器設定運算放大器增益到選擇適當的電路設計元件以穩定類比數位轉換器 (ADC) 驅動緩衝電路。

除了作為獨立工具使用外，此計算機還與類比工程師口袋參考中描述的概念相得益彰。

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設計工具

ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL — The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.

The ADC-TO-VREF-SELECT tool enables the pairing of TI analog-to-digital converters (ADCs) and series voltage references. Users can select an ADC device and the desired reference voltage, and the tool will list up to two voltage reference recommendations.
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參考設計

TIDA-01355 — 採用時間交錯式 SAR ADC 並具有 73dB SNR 和 7.5 MSPS 且適用於成像應用的類比前端參考設計

此參考設計展示如何以低 BOM 成本實現具高取樣率和良好解析度的多種 ADC 交叉。打造本參考設計時將電子影像系統納入考量。高解析度成像及其他高速訊號處理應用需要可實現高解析度、高 SNR、高速與低功耗的 ADC。使用單晶片始終無法滿足這些要求。此設計透過交錯多種 SAR ADC，讓不同 ADC 間的折衷最佳化，以滿足所有系統需求。
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封裝 針腳 CAD 符號、佔位空間與 3D 模型
X2QFN (RUG) 8 Ultra Librarian
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