ADS131M03
- 3 simultaneously sampling differential inputs
- Programmable data rate up to 64 kSPS
- Programmable gain up to 128
- Noise performance:
- 102-dB dynamic range at gain = 1, 4 kSPS
- 80-dB dynamic range at gain = 64, 4 kSPS
- Total harmonic distortion: –100 dB
- High-impedance inputs for direct sensor connection:
- Input impedance 330-kΩ for gains of 1, 2, and 4
- Input impedance ≥ 1-MΩ for gains of 8, 16, 32, 64, and 128
- Programmable channel-to-channel phase delay calibration:
- 244-ns resolution, 8.192-MHz fCLKIN
- Current-detect mode allows for extremely low power tamper detection
- Fast startup: first data within 0.5 ms of supply ramp
- Integrated negative charge pump allows input signals below ground
- Crosstalk between channels: –120 dB
- Low-drift internal voltage reference
- Cyclic redundancy check (CRC) on communications and register map
- 2.7-V to 3.6-V analog and digital supplies
- Low power consumption: 3.6 mW at 3-V AVDD and DVDD
- Packages:
- 20-pin TSSOP or 20-pin WQFN
- Operating temperature range: –40°C to +125°C
The ADS131M03 is a three-channel, simultaneously-sampling, 24-bit, delta-sigma (ΔΣ), analog-to-digital converter (ADC) that offers wide dynamic range, low power, and energy-measurement-specific features, making the device an excellent fit for energy metering, power metrology, and circuit breaker applications. The ADC inputs can be directly interfaced to a resistor-divider network or a power transformer to measure voltage or to a current transformer, shunt, or a Rogowski coil to measure current.
The individual ADC channels can be independently configured depending on the sensor input. A low-noise, programmable gain amplifier (PGA) provides gains ranging from 1 to 128 to amplify low-level signals. Additionally, this device integrates channel-to-channel phase calibration and offset and gain calibration registers to help remove signal-chain errors.
A low-drift, 1.2-V reference is integrated into the device reducing printed circuit board (PCB) area. Optional cyclic redundancy checks (CRCs) on the data input, data output, and register map maintain communication integrity.
The complete analog front-end (AFE) is offered in a 20-pin TSSOP package or a leadless 20-pin WQFN package and is specified over the industrial temperature range of –40°C to +125°C.
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技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | ADS131M03 3-Channel, Simultaneously-Sampling, 24-Bit, Delta-Sigma ADC datasheet (Rev. A) | PDF | HTML | 2021/4/7 | ||
| 應用說明 | A Simple, Java-Based CRC Calculator | PDF | HTML | 2026/3/4 | |||
| Application brief | Electricity Metering Reference Designs Selection Guide | PDF | HTML | 2026/1/6 | |||
| 應用說明 | A Basic Guide to Bridge Measurements (Rev. A) | PDF | HTML | 2024/3/13 | |||
| 應用說明 | Digital Filter Types in Delta-Sigma ADCs (Rev. A) | PDF | HTML | 2023/3/29 | |||
| Circuit design | Circuit for protecting ADS131M0x ADC from electrical overstress | PDF | HTML | 2021/3/31 |
設計與開發
如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。
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| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| WQFN (RUK) | 20 | Ultra Librarian |
| TSSOP (PW) | 20 | Ultra Librarian |
訂購與品質
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