支援軟體
ADS125P08-MSPM0-EXAMPLE-CODE — ADS125P08 C Example Code
Start developing your embedded solution with example code for the ADS125P08 using an MSPM0 Launchpad
ADS125P08
- Programmable data rate up to 1.067MSPS
- Analog multiplexer with 17 independently selectable inputs:
- Up to 8 fully differential inputs
- Up to 16 single ended inputs
- Rail-to-rail analog input buffer and reference buffer
- Internal voltage reference, selectable output 2.5V or 4.096V
- Fault detection and monitor circuits
- General-Purpose I/Os
- Internal Oscillator: 25.6MHz, 1% Accuracy
- Channel auto-sequencer and FIFO buffer
- Simultaneous 50Hz and 60Hz rejection at ≤ 25 SPS with low-latency digital filter
- Power-scalable architecture with four speed modes
The ADS125P08 is a multiplexed 8/16-Channel, 24 bit, delta-sigma (ΔΣ), analog-to-digital converter (ADC) with data rates up to 1MSPS and is configurable to accept up to 8 fully differential analog inputs or up to 16 single-ended analog inputs. The device offers an excellent combination of ac performance and dc precision with low power consumption.
The device integrates high-impedance input and reference buffers to reduce signal loading. The ADS125P08 is equipped with a channel auto-sequencer and a FIFO (first-in, first-out) buffer. The power-scalable architecture provides four speed modes to optimize data rate, resolution, and power consumption.
Input and output data and register settings are validated by a cyclic-redundancy check (CRC) feature to enhance operational reliability.
The small 5mm × 5mm VQFN package is designed for limited space applications. The device is fully specified for operation over the –40°C to +125°C temperature range.
技術文件
找不到結果。請清除您的搜尋條件，然後再試一次。
檢視所有 5 | 重要文件 | 類型 | 標題 | 格式選項 | 日期 |
|---|---|---|---|---|
| * | Data sheet | ADS125P08 8/16-Channel, 1MSPS , 24 -Bit, Delta-Sigma ADC datasheet | PDF | HTML | 2025年 12月 18日 |
| Circuit design | 4-Ch, diff. in., DAQ front-end circuit w/ configurable voltage & current inputs (Rev. A) | PDF | HTML | 2024年 9月 19日 | |
| Application note | Calculating Conversion Latency and System Cycle Time for Delta-Sigma ADCs (Rev. A) | PDF | HTML | 2024年 3月 18日 | |
| Application note | Digital Filter Types in Delta-Sigma ADCs (Rev. A) | PDF | HTML | 2023年 3月 29日 | |
| E-book | Fundamentals of Precision ADC Noise Analysis (Rev. A) | 2020年 6月 19日 |
設計與開發
如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。
開發板
ADS125P08EVM-PDK — ADS125P08 評估模組
ADS125P08 評估模組 (EVM) 是用於評估 ADS125P08 效能的平台；此款 24 位元、16 通道、1MSPS 多工 Delta-Sigma (ΔΣ) 類比數位轉換器 (ADC)，專為低延遲、高精確度資料擷取系統而設計。ADS125P08 整合高度彈性的通道排序器、低雜訊電壓參考、時脈振盪器及多種診斷功能，有助於設計高可靠度系統。ADS125P08EVM-PDK 透過通用序列匯流排 (USB) 介面簡化了對硬體、軟體和電腦連線能力的裝置評估。
計算工具
ANALOG-ENGINEER-CALC — PC software analog engineer's calculator
The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)
支援產品和硬體
模擬工具
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
PSpice® for TI 是有助於評估類比電路功能的設計和模擬環境。這款全功能設計和模擬套件使用 Cadence® 的類比分析引擎。PSpice for TI 包括業界最大的模型庫之一，涵蓋我們的類比和電源產品組合，以及特定類比行為模型，且使用無需支付費用。
PSpice for TI 設計和模擬環境可讓您使用其內建函式庫來模擬複雜的混合訊號設計。在進行佈局和製造之前，建立完整的終端設備設計和解決方案原型，進而縮短上市時間並降低開發成本。
在 PSpice for TI 設計與模擬工具中，您可以搜尋 TI (...)
PSpice for TI 設計和模擬環境可讓您使用其內建函式庫來模擬複雜的混合訊號設計。在進行佈局和製造之前，建立完整的終端設備設計和解決方案原型，進而縮短上市時間並降低開發成本。
在 PSpice for TI 設計與模擬工具中，您可以搜尋 TI (...)
模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| VQFN (RHB) | 36 | Ultra Librarian |
訂購與品質
內含資訊：
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中的可靠性監測
內含資訊：
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。