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The ADS62P19 is part of a family of dual-channel, 11-bit, analog-to-digital converters (ADCs) with sampling rates up to 250 MSPS. The device combines high dynamic performance and low power consumption in a compact QFN-64 package. This functionality makes the device well-suited for multi-carrier, wide-bandwidth communication applications.
The ADS62P19 has gain options that can be used to improve spurious-free dynamic range (SFDR) performance at lower full-scale input ranges. The device includes a dc offset correction loop that can be used to cancel ADC offset. Both double data rate (DDR) low-voltage differential signaling (LVDS) and parallel complementary metal oxide semiconductor (CMOS) digital output interfaces are available.
Although the device includes internal references, the traditional reference pins and associated decoupling capacitors are eliminated. Nevertheless, the device can also be driven with an external reference. The device is specified over the industrial temperature range (–40°C to +85°C).
| 重要文件 | 類型 | 標題 | 格式選項 | 日期 |
|---|---|---|---|---|
| * | Data sheet | Dual-Channel, 11-Bit, 250-MSPS ADC With DDR LVDS and Parallel CMOS Outputs datasheet | 2013年 4月 30日 | |
| Application note | Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A) | 2015年 5月 22日 | ||
| Application note | Why Use Oversampling when Undersampling Can Do the Job? (Rev. A) | 2013年 7月 19日 |
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The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| VQFN (RGC) | 64 | Ultra Librarian |
Analog Engineer's Calc Installer
General calculator tool for analog design support.