產品詳細資料

Sample rate (max) (Msps) 125 Resolution (Bits) 12 Number of input channels 2 Interface type DDR LVDS, Parallel CMOS Analog input BW (MHz) 600 Features Low Power Rating Catalog Peak-to-peak input voltage range (V) 2 Power consumption (typ) (mW) 277 Architecture Pipeline SNR (dB) 70.9 ENOB (Bits) 11.3 SFDR (dB) 91 Operating temperature range (°C) -40 to 85 Input buffer No
Sample rate (max) (Msps) 125 Resolution (Bits) 12 Number of input channels 2 Interface type DDR LVDS, Parallel CMOS Analog input BW (MHz) 600 Features Low Power Rating Catalog Peak-to-peak input voltage range (V) 2 Power consumption (typ) (mW) 277 Architecture Pipeline SNR (dB) 70.9 ENOB (Bits) 11.3 SFDR (dB) 91 Operating temperature range (°C) -40 to 85 Input buffer No
VQFN (RGC) 64 81 mm² (9 mm × 9 mm)
  • Ultralow power with single 1.8-V Supply, CMOS output:
    • 183 mW Total power at 65 MSPS
    • 277 mW Total power at 125 MSPS
    • 332 mW Total power at 160 MSPS
  • High dynamic performance:
    • 88-dBc SFDR at 170 MHz
    • 71.4-dBFS SNR at 170 MHz
  • Crosstalk: > 90 dB at 185 MHz
  • Programmable gain up to 6 dB for SNR/SFDR trade-off
  • DC offset correction
  • Output interface options:
    • 1.8-V parallel CMOS interface
    • Double data rate (DDR) LVDS with programmable swing:
      • Standard swing: 350 mV
      • Low swing: 200 mV
  • Supports low input clock amplitude down to 200 mVPP
  • Package: VQFN-64 (9.00 mm × 9.00 mm)
  • Ultralow power with single 1.8-V Supply, CMOS output:
    • 183 mW Total power at 65 MSPS
    • 277 mW Total power at 125 MSPS
    • 332 mW Total power at 160 MSPS
  • High dynamic performance:
    • 88-dBc SFDR at 170 MHz
    • 71.4-dBFS SNR at 170 MHz
  • Crosstalk: > 90 dB at 185 MHz
  • Programmable gain up to 6 dB for SNR/SFDR trade-off
  • DC offset correction
  • Output interface options:
    • 1.8-V parallel CMOS interface
    • Double data rate (DDR) LVDS with programmable swing:
      • Standard swing: 350 mV
      • Low swing: 200 mV
  • Supports low input clock amplitude down to 200 mVPP
  • Package: VQFN-64 (9.00 mm × 9.00 mm)

The ADS424x and ADS422x family of devices are low-speed variants of the ADS42xx ultralow-power family of dual-channel, 14-bit or 12-bit analog-to-digital converters (ADCs). Innovative design techniques are used to achieve high-dynamic performance, while consuming extremely low power with 1.8-V supply. This topology makes the ADS424x/422x well-suited for multi-carrier, wide-bandwidth communications applications.

The ADS424x and ADS422x family of devices are low-speed variants of the ADS42xx ultralow-power family of dual-channel, 14-bit or 12-bit analog-to-digital converters (ADCs). Innovative design techniques are used to achieve high-dynamic performance, while consuming extremely low power with 1.8-V supply. This topology makes the ADS424x/422x well-suited for multi-carrier, wide-bandwidth communications applications.

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設計與開發

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開發板

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開發模組 (EVM) 的 GUI

ADS58C28SPIGUI-SW — ADS42xxx SPI GUI

ADS58C28SPIGUI-SW is the installation package for ADS58C28_ADS42xx_GUI which is used to access or write internal registers of ADS58C28 through an on-board USB port.
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開發模組 (EVM) 的 GUI

DATACONVERTERPRO-SW — 高速資料轉換器 Pro GUI 安裝程式,v5.31

這款高速資料轉換器專業 GUI 是一款 PC(與 Windows® XP/7/10 相容)程式,旨在協助評估大多數 TI 高速資料轉換器 [類比轉數位轉換器 (ADC) 和數位轉類比轉換器 (DAC)] 和類比前端 (AFE) 平台。DATACONVERTERPRO-SW 旨在支援整個 TSW14xxx 系列資料擷取和模式產生卡,為時域和頻域中的資料轉換器分析提供強大且快速的解決方案,並支援單音、多音和調變訊號。此 GUI 也與 TI 模式產生 GUI 相容,可快速合成單音、多音和調變訊號。

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模擬型號

ADS422x, ADS424x IBIS Model (Rev. B)

SBAM094 (40 KB) - IBIS 模型
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計算工具

ANALOG-ENGINEER-CALC — PC software analog engineer's calculator

類比工程師的計算機旨在加速類比電路設計工程師定期使用的許多重複計算。此基於 PC 的工具提供圖形介面,列出各種常見計算,從使用回饋電阻器設定運算放大器增益到選擇適當的電路設計元件以穩定類比數位轉換器 (ADC) 驅動緩衝電路。

除了作為獨立工具使用外,此計算機還與類比工程師口袋參考中描述的概念相得益彰。

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設計工具

SBAC119 — TIGAR (Texas Instruments Graphical Evaluation of ADC Response Tool)

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封裝 針腳 CAD 符號、佔位空間與 3D 模型
VQFN (RGC) 64 Ultra Librarian

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