產品詳細資料

Sample rate (max) (Msps) 800 Resolution (Bits) 12 Number of input channels 2 Interface type DDR LVDS Analog input BW (MHz) 1200 Features High Performance Rating Catalog Peak-to-peak input voltage range (V) 1 Power consumption (typ) (mW) 2100 Architecture Pipeline SNR (dB) 61.8 ENOB (Bits) 9.8 SFDR (dB) 74 Operating temperature range (°C) -40 to 85 Input buffer No
Sample rate (max) (Msps) 800 Resolution (Bits) 12 Number of input channels 2 Interface type DDR LVDS Analog input BW (MHz) 1200 Features High Performance Rating Catalog Peak-to-peak input voltage range (V) 1 Power consumption (typ) (mW) 2100 Architecture Pipeline SNR (dB) 61.8 ENOB (Bits) 9.8 SFDR (dB) 74 Operating temperature range (°C) -40 to 85 Input buffer No
NFBGA (ZAY) 196 144 mm² 12 x 12
  • Dual Channel
  • 12-Bit Resolution
  • Maximum Clock Rate: 800 Msps
  • Low Swing Fullscale Input: 1.0 Vpp
  • Analog Input Buffer with High Impedance Input
  • Input Bandwidth (3dB): >1.2GHz
  • Data Output Interface: DDR LVDS
  • Optional 2x Decimation with Low Pass or High
    Pass Filter
  • 196-Pin BGA Package (12×12mm)
  • Dual Channel
  • 12-Bit Resolution
  • Maximum Clock Rate: 800 Msps
  • Low Swing Fullscale Input: 1.0 Vpp
  • Analog Input Buffer with High Impedance Input
  • Input Bandwidth (3dB): >1.2GHz
  • Data Output Interface: DDR LVDS
  • Optional 2x Decimation with Low Pass or High
    Pass Filter
  • 196-Pin BGA Package (12×12mm)

The ADS5402 is a high linearity dual channel 12-bit, 800 Msps analog-to-digital converter (ADC) easing front end filter design for wide bandwidth receivers. The analog input buffer isolates the internal switching of the on-chip track-and-hold from disturbing the signal source as well as providing a high-impedance input. Optionally the output data can be decimated by two. Designed for high SFDR, the ADC has low-noise performance and very good spurious-free dynamic range over a large input-frequency range. The device is available in a 196-pin BGA package and is specified over the full industrial temperature range (–40°C to 85°C).

The ADS5402 is a high linearity dual channel 12-bit, 800 Msps analog-to-digital converter (ADC) easing front end filter design for wide bandwidth receivers. The analog input buffer isolates the internal switching of the on-chip track-and-hold from disturbing the signal source as well as providing a high-impedance input. Optionally the output data can be decimated by two. Designed for high SFDR, the ADC has low-noise performance and very good spurious-free dynamic range over a large input-frequency range. The device is available in a 196-pin BGA package and is specified over the full industrial temperature range (–40°C to 85°C).

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重要文件 類型 標題 格式選項 日期
* Data sheet Dual 12-Bit 800Msps Analog-to-Digital Converter, ADS5402 datasheet (Rev. B) 2014年 1月 8日
Design guide TSW1266 Wideband RF-to-Digital Complex Receiver-Feedback Signal Chain 2013年 9月 3日
User guide TSW1266EVM Evaluation Module 2012年 12月 18日

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