ADS5402
- Dual Channel
- 12-Bit Resolution
- Maximum Clock Rate: 800 Msps
- Low Swing Fullscale Input: 1.0 Vpp
- Analog Input Buffer with High Impedance Input
- Input Bandwidth (3dB): >1.2GHz
- Data Output Interface: DDR LVDS
- Optional 2x Decimation with Low Pass or High
Pass Filter - 196-Pin BGA Package (12×12mm)
The ADS5402 is a high linearity dual channel 12-bit, 800 Msps analog-to-digital converter (ADC) easing front end filter design for wide bandwidth receivers. The analog input buffer isolates the internal switching of the on-chip track-and-hold from disturbing the signal source as well as providing a high-impedance input. Optionally the output data can be decimated by two. Designed for high SFDR, the ADC has low-noise performance and very good spurious-free dynamic range over a large input-frequency range. The device is available in a 196-pin BGA package and is specified over the full industrial temperature range (–40°C to 85°C).
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | Dual 12-Bit 800Msps Analog-to-Digital Converter, ADS5402 datasheet (Rev. B) | PDF | HTML | 2014/1/8 | ||
| 設計指南 | TSW1266 Wideband RF-to-Digital Complex Receiver-Feedback Signal Chain | 2013/9/3 | ||||
| 使用指南 | TSW1266EVM Evaluation Module | 2012/12/18 |
設計與開發
如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。
ADS5402EVM — 用於高達 800 MSPS 雙通道的 ADS5402 評估模組
The ADS540x and ADS54T0x EVM is a circuit board that allows designers to evaluate the performance of Texas Instruments ADS5401/02/03/04/07/09 single/dual channel 12-bit 500/800/900 MSPS analog to digital converters and ADS54T01/T04/T02, which are single/dual channel 500/750MSPS BTS feedback and (...)
ANALOG-ENGINEER-CALC — PC software analog engineer's calculator
類比工程師的計算機旨在加速類比電路設計工程師定期使用的許多重複計算。此基於 PC 的工具提供圖形介面,列出各種常見計算,從使用回饋電阻器設定運算放大器增益到選擇適當的電路設計元件以穩定類比數位轉換器 (ADC) 驅動緩衝電路。
除了作為獨立工具使用外,此計算機還與類比工程師口袋參考中描述的概念相得益彰。
SBAC119 — TIGAR (Texas Instruments Graphical Evaluation of ADC Response Tool)
TIDA-00070 — 用於量測類比數位轉換器輸出字中的位元錯誤的 FPGA 韌體專案
For applications where there are bit errors and resulting sample errors (also called sparkle codes, word errors, or code errors), the ability to measure the Error rates caused by these bit errors is important. This FPGA firmware based application note proposes a method to accurately measure these (...)
TIDA-00074 — 寬頻射頻轉數位複雜接收器 - 回饋訊號鏈
這是一款寬頻複合接收器參考設計和評估平台,非常適合作為發射器數位預失真的回饋接收器使用。EVM 訊號鏈非常適合高中頻 (IF) 複合回饋應用,其中包含一個複合解調器、TI 的 LMH6521 雙通道 DVGA 和 ADS5402 12 位元 800-MSPS 雙通道 ADC。透過修改板載濾波器元件,訊號鏈可針對各種頻率計劃進行配置。EVM 也包括 TI 的 LMK04808 雙 PLL 時鐘抖動清除器和產生器,用以提供板載低雜訊時脈解決方案。可透過 GUI 或透過具有 FPGA 的高速連接器控制 LMH6521 DVGA 增益。
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| NFBGA (ZAY) | 196 | Ultra Librarian |
訂購與品質
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。