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類比轉數位轉換器 (ADC)
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ADS7865

現行

雙路、2MSPS、12 位元、3+3 或 2+2 通道、同步取樣 ADC

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產品規格表

ADS7865

現行
產品規格表 立即訂購

產品詳細資料

Resolution (Bits) 12 Sample rate (max) (ksps) 2000 Number of input channels 6 Interface type Parallel Architecture SAR Input type Differential, Pseudo-Differential Multichannel configuration Multiplexed Rating Catalog Reference mode External, Internal Input voltage range (max) (V) 5.5 Input voltage range (min) (V) 0 Operating temperature range (°C) -40 to 125 Power consumption (typ) (mW) 30 Analog supply voltage (min) (V) 2.7 Analog supply voltage (max) (V) 5.5 SNR (dB) 71.7 Digital supply (min) (V) 2.7 Digital supply (max) (V) 5.5
Resolution (Bits) 12 Sample rate (max) (ksps) 2000 Number of input channels 6 Interface type Parallel Architecture SAR Input type Differential, Pseudo-Differential Multichannel configuration Multiplexed Rating Catalog Reference mode External, Internal Input voltage range (max) (V) 5.5 Input voltage range (min) (V) 0 Operating temperature range (°C) -40 to 125 Power consumption (typ) (mW) 30 Analog supply voltage (min) (V) 2.7 Analog supply voltage (max) (V) 5.5 SNR (dB) 71.7 Digital supply (min) (V) 2.7 Digital supply (max) (V) 5.5
TQFP (PBS) 32 49 mm² 7 x 7
  • Six Pseudo- or Four Fully Differential Inputs
  • SNR: 71.7dB, THD: –87dB
  • Programmable Channel Sequencer
  • Programmable and Buffered Internal 2.5V Reference
  • Flexible Power-Down Features
  • Variable Power-Supply Ranges: 2.7V to 5.5V
  • Low-Power Operation: 44mW Maximum at 5V
  • Operating Temperature Range:
    –40°C to +125°C
  • Pin-Compatible Upgrade for the ADS7862
  • Six Pseudo- or Four Fully Differential Inputs
  • SNR: 71.7dB, THD: –87dB
  • Programmable Channel Sequencer
  • Programmable and Buffered Internal 2.5V Reference
  • Flexible Power-Down Features
  • Variable Power-Supply Ranges: 2.7V to 5.5V
  • Low-Power Operation: 44mW Maximum at 5V
  • Operating Temperature Range:
    –40°C to +125°C
  • Pin-Compatible Upgrade for the ADS7862

The ADS7865 is a dual, 12-bit, 2MSPS analog-to-digital converter (ADC) with four fully differential or six pseudo-differential input channels grouped into two pairs for high-speed, simultaneous signal acquisition. Inputs to the sample-and-hold (S/H) amplifiers are fully differential and are maintained differentially to the input of the ADC. This architecture provides excellent common-mode rejection of 72dB at 100kHz, which is a critical performance characteristic in noisy environments.

The ADS7865 is pin-compatible with the ADS7862, but offers additional features such as a programmable channel sequencer and reference output, flexible supply voltage (2.7V to 5.5V for AVDD and BVDD), a pseudo-differential input multiplexer with three channels per ADC, and several power-down features.

The ADS7865 is offered in a TQFP-32 package. It is specified over the extended operating temperature range of –40°C to +125°C.

The ADS7865 is a dual, 12-bit, 2MSPS analog-to-digital converter (ADC) with four fully differential or six pseudo-differential input channels grouped into two pairs for high-speed, simultaneous signal acquisition. Inputs to the sample-and-hold (S/H) amplifiers are fully differential and are maintained differentially to the input of the ADC. This architecture provides excellent common-mode rejection of 72dB at 100kHz, which is a critical performance characteristic in noisy environments.

The ADS7865 is pin-compatible with the ADS7862, but offers additional features such as a programmable channel sequencer and reference output, flexible supply voltage (2.7V to 5.5V for AVDD and BVDD), a pseudo-differential input multiplexer with three channels per ADC, and several power-down features.

The ADS7865 is offered in a TQFP-32 package. It is specified over the extended operating temperature range of –40°C to +125°C.
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重要文件 類型 標題 格式選項 日期
* Data sheet Dual, 12-Bit, 3+3 or 2+2 Channel, Simultaneous Sampling ADC datasheet (Rev. C) 2012年 4月 17日
E-book Best of Baker's Best: Precision Data Converters -- SAR ADCs 2015年 5月 21日
Application note Determining Minimum Acquisition Times for SAR ADCs, part 2 2011年 3月 17日
Application note Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A) 2010年 11月 10日
Application note Interfacing the ADS786x to the MSP430F2013 2006年 6月 15日

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ANALOG-ENGINEER-CALC — PC software analog engineer's calculator

The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)

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ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL — The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.

The ADC-TO-VREF-SELECT tool enables the pairing of TI analog-to-digital converters (ADCs) and series voltage references. Users can select an ADC device and the desired reference voltage, and the tool will list up to two voltage reference recommendations.
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PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI 是有助於評估類比電路功能的設計和模擬環境。這款全功能設計和模擬套件使用 Cadence® 的類比分析引擎。PSpice for TI 包括業界最大的模型庫之一，涵蓋我們的類比和電源產品組合，以及特定類比行為模型，且使用無需支付費用。

PSpice for TI 設計和模擬環境可讓您使用其內建函式庫來模擬複雜的混合訊號設計。在進行佈局和製造之前，建立完整的終端設備設計和解決方案原型，進而縮短上市時間並降低開發成本。 

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TINA-TI — 基於 SPICE 的類比模擬程式

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