ADC3541
- 14-bit 10/25/65 MSPS ADC
- Noise floor: –155 dBFS/Hz
- Ultra-low power with optimized power scaling: 35 mW (10 MSPS) to 84 mW (65 MSPS)
- Latency: 1 clock cycle
- INL: ±0.6 LSB; DNL: ±0.1 LSB
- Reference: external or internal
- Input Bandwidth: 900 MHz (3-dB)
- Industrial temperature range: –40°C to +105°C
- On-chip digital filter (optional)
- Decimation by 2, 4, 8, 16, 32
- 32-bit NCO
- SDR/DDR and Serial CMOS interface
- Small footprint: 40-WQFN (5 mm × 5 mm) package
- Single 1.8-V supply
- Spectral Performance (fIN = 10 MHz):
- SNR: 79.0 dBFS
- SFDR: 87 dBc HD2, HD3
- SFDR: 99 dBFS Worst Spur
- Spectral Performance (fIN = 64 MHz):
- SNR: 78.0 dBFS
- SFDR: 70 dBc HD2, HD3
- SFDR: 91 dBFS Worst Spur
The ADC3541, ADC3542 and ADC3543 (ADC354x) family of devices are low-noise, ultra-low power, 14-bit, 10 to 65-MSPS, high-speed analog-to-digital converters (ADCs). Designed for low power consumption, these devices deliver a noise spectral density of –155 dBFS/Hz. The ADC354x offers great dc precision together with IF sampling support, which make these devices an excellent choice for a wide range of applications. High-speed control loops benefit from the short latency of only one clock cycle. The ADC consumes only 79 mW at 65 MSPS, and the power consumption scales very well with lower sampling rates.
The ADC354x uses an SDR, DDR or a serial CMOS interface to output the data offering the lowest power digital interface, together with the flexibility to minimize the number of digital interconnects. These devices are a pin-to-pin compatible family with different speed grades. These devices support the extended industrial temperature range of –40°C to +105⁰C.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | ADC354x 14-bit, 10-MSPS to 65-MSPS, Low-noise, Ultra-low Power ADC datasheet (Rev. C) | PDF | HTML | 2022/12/15 | ||
| 應用說明 | High-Speed ADC: How to Properly Terminate Single-ended CMOS Digital Outputs | 2020/12/9 | ||||
| 應用說明 | High Speed SAR ADC: Data Rate, Performance, and Pin Count Optimization | PDF | HTML | 2020/12/8 | |||
| 類比設計期刊 | How to simplify AFE filtering via high‐speed ADCs with internal digital filters | 2020/1/10 |
設計與開發
如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。
ADC3541EVM — 適用單通道、低雜訊、超低功耗和低延遲 ADC 的 ADC3541 評估模組
ADC3543EVM — ADC354x 評估模組
DATACONVERTERPRO-SW — 高速資料轉換器 Pro GUI 安裝程式,v5.31
這款高速資料轉換器專業 GUI 是一款 PC(與 Windows® XP/7/10 相容)程式,旨在協助評估大多數 TI 高速資料轉換器 [類比轉數位轉換器 (ADC) 和數位轉類比轉換器 (DAC)] 和類比前端 (AFE) 平台。DATACONVERTERPRO-SW 旨在支援整個 TSW14xxx 系列資料擷取和模式產生卡,為時域和頻域中的資料轉換器分析提供強大且快速的解決方案,並支援單音、多音和調變訊號。此 GUI 也與 TI 模式產生 GUI 相容,可快速合成單音、多音和調變訊號。
使用者可以向 DATACONVERTERPRO-SW 提供自訂模式,以載入到 TI DAC。支援從 (...)
ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL — The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| WQFN (RSB) | 40 | Ultra Librarian |
訂購與品質
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。