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數據轉換器
類比轉數位轉換器 (ADC)
高速 ADC (≥10 MSPS)

ADC3541

現行

單通道、14 位元、10MSPS、低雜訊、超低功耗及低延遲 ADC

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產品規格表

ADC3541

現行
產品規格表 立即訂購

產品詳細資料

Sample rate (max) (Msps) 10 Resolution (Bits) 14 Number of input channels 1 Interface type CMOS Analog input BW (MHz) 900 Features High Performance, Low Power Rating Catalog Peak-to-peak input voltage range (V) 2.25 Power consumption (typ) (mW) 36 Architecture SAR SNR (dB) 79 ENOB (Bits) 12.8 SFDR (dB) 90 Operating temperature range (°C) -40 to 105 Input buffer No
Sample rate (max) (Msps) 10 Resolution (Bits) 14 Number of input channels 1 Interface type CMOS Analog input BW (MHz) 900 Features High Performance, Low Power Rating Catalog Peak-to-peak input voltage range (V) 2.25 Power consumption (typ) (mW) 36 Architecture SAR SNR (dB) 79 ENOB (Bits) 12.8 SFDR (dB) 90 Operating temperature range (°C) -40 to 105 Input buffer No
WQFN (RSB) 40 25 mm² 5 x 5
  • 14-bit 10/25/65 MSPS ADC
  • Noise floor: –155 dBFS/Hz
  • Ultra-low power with optimized power scaling: 35 mW (10 MSPS) to 84 mW (65 MSPS)
  • Latency: 1 clock cycle
  • INL: ±0.6 LSB; DNL: ±0.1 LSB
  • Reference: external or internal
  • Input Bandwidth: 900 MHz (3-dB)
  • Industrial temperature range: –40°C to +105°C
  • On-chip digital filter (optional)
    • Decimation by 2, 4, 8, 16, 32
    • 32-bit NCO
  • SDR/DDR and Serial CMOS interface
  • Small footprint: 40-WQFN (5 mm × 5 mm) package
  • Single 1.8-V supply
  • Spectral Performance (fIN = 10 MHz):
    • SNR: 79.0 dBFS
    • SFDR: 87 dBc HD2, HD3
    • SFDR: 99 dBFS Worst Spur
  • Spectral Performance (fIN = 64 MHz):
    • SNR: 78.0 dBFS
    • SFDR: 70 dBc HD2, HD3
    • SFDR: 91 dBFS Worst Spur
  • 14-bit 10/25/65 MSPS ADC
  • Noise floor: –155 dBFS/Hz
  • Ultra-low power with optimized power scaling: 35 mW (10 MSPS) to 84 mW (65 MSPS)
  • Latency: 1 clock cycle
  • INL: ±0.6 LSB; DNL: ±0.1 LSB
  • Reference: external or internal
  • Input Bandwidth: 900 MHz (3-dB)
  • Industrial temperature range: –40°C to +105°C
  • On-chip digital filter (optional)
    • Decimation by 2, 4, 8, 16, 32
    • 32-bit NCO
  • SDR/DDR and Serial CMOS interface
  • Small footprint: 40-WQFN (5 mm × 5 mm) package
  • Single 1.8-V supply
  • Spectral Performance (fIN = 10 MHz):
    • SNR: 79.0 dBFS
    • SFDR: 87 dBc HD2, HD3
    • SFDR: 99 dBFS Worst Spur
  • Spectral Performance (fIN = 64 MHz):
    • SNR: 78.0 dBFS
    • SFDR: 70 dBc HD2, HD3
    • SFDR: 91 dBFS Worst Spur

The ADC3541, ADC3542 and ADC3543 (ADC354x) family of devices are low-noise, ultra-low power, 14-bit, 10 to 65-MSPS, high-speed analog-to-digital converters (ADCs). Designed for low power consumption, these devices deliver a noise spectral density of –155 dBFS/Hz. The ADC354x offers great dc precision together with IF sampling support, which make these devices an excellent choice for a wide range of applications. High-speed control loops benefit from the short latency of only one clock cycle. The ADC consumes only 79 mW at 65 MSPS, and the power consumption scales very well with lower sampling rates.

The ADC354x uses an SDR, DDR or a serial CMOS interface to output the data offering the lowest power digital interface, together with the flexibility to minimize the number of digital interconnects. These devices are a pin-to-pin compatible family with different speed grades. These devices support the extended industrial temperature range of –40°C to +105⁰C.

The ADC3541, ADC3542 and ADC3543 (ADC354x) family of devices are low-noise, ultra-low power, 14-bit, 10 to 65-MSPS, high-speed analog-to-digital converters (ADCs). Designed for low power consumption, these devices deliver a noise spectral density of –155 dBFS/Hz. The ADC354x offers great dc precision together with IF sampling support, which make these devices an excellent choice for a wide range of applications. High-speed control loops benefit from the short latency of only one clock cycle. The ADC consumes only 79 mW at 65 MSPS, and the power consumption scales very well with lower sampling rates.

The ADC354x uses an SDR, DDR or a serial CMOS interface to output the data offering the lowest power digital interface, together with the flexibility to minimize the number of digital interconnects. These devices are a pin-to-pin compatible family with different speed grades. These devices support the extended industrial temperature range of –40°C to +105⁰C.
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技術文件

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重要文件 類型 標題 格式選項 日期
* Data sheet ADC354x 14-bit, 10-MSPS to 65-MSPS, Low-noise, Ultra-low Power ADC datasheet (Rev. C) PDF | HTML 2022年 12月 15日
Application note High-Speed ADC: How to Properly Terminate Single-ended CMOS Digital Outputs 2020年 12月 9日
Application note High Speed SAR ADC: Data Rate, Performance, and Pin Count Optimization PDF | HTML 2020年 12月 8日
Analog Design Journal How to simplify AFE filtering via high‐speed ADCs with internal digital filters 2020年 1月 10日

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ADC3543EVM — ADC354x 評估模組

ADC354x 評估模組 (EVM) 旨在用於評估 ADC36xx 系列高速類比數位轉換器 (ADC) 中的單通道型號，包括 ADC3543 與 ADC3544。此系列 ADC 具備可設定的序列或並行低壓 CMOS (LVCMOS) 資料介面。
使用指南: PDF | HTML
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開發模組 (EVM) 的 GUI

DATACONVERTERPRO-SW — High Speed Data Converter Pro GUI Installer, v5.31

This high-speed data converter pro GUI is a PC (Windows® XP/7/10 compatible) program designed to aid in evaluation of most TI high-speed data converter [analog-to-digital converter (ADC) and digital-to-analog converter (DAC)] and analog front-end (AFE) platforms. Designed to support the entire (...)

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ADC35xx TINA-TI Reference Design

SBAM455.ZIP (158 KB) - TINA-TI Reference Design
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ADC3541EVM Design Files (Rev. A)

SBAR009A.ZIP (8583 KB)
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設計工具

ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL — The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.

The ADC-TO-VREF-SELECT tool enables the pairing of TI analog-to-digital converters (ADCs) and series voltage references. Users can select an ADC device and the desired reference voltage, and the tool will list up to two voltage reference recommendations.
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