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ADS1283

現行

具 PGA 且適用地震和能源勘探的超高解析度 4-kSPS 2 通道 ΔΣ ADC

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產品規格表

ADS1283

現行
產品規格表 立即訂購

產品詳細資料

Resolution (Bits) 31 Sample rate (max) (ksps) 4 Number of input channels 2 Interface type SPI Architecture Delta-Sigma Input type Differential Multichannel configuration Multiplexed Rating Catalog Reference mode External Input voltage range (max) (V) 1.15, 3.75 Input voltage range (min) (V) -1.9, 0.7 Features PGA Operating temperature range (°C) -40 to 85 Power consumption (typ) (mW) 18 Analog supply voltage (min) (V) -2.5, 0 Analog supply voltage (max) (V) 2.5, 5 SNR (dB) 130 Digital supply (min) (V) 1.65 Digital supply (max) (V) 3.6
Resolution (Bits) 31 Sample rate (max) (ksps) 4 Number of input channels 2 Interface type SPI Architecture Delta-Sigma Input type Differential Multichannel configuration Multiplexed Rating Catalog Reference mode External Input voltage range (max) (V) 1.15, 3.75 Input voltage range (min) (V) -1.9, 0.7 Features PGA Operating temperature range (°C) -40 to 85 Power consumption (typ) (mW) 18 Analog supply voltage (min) (V) -2.5, 0 Analog supply voltage (max) (V) 2.5, 5 SNR (dB) 130 Digital supply (min) (V) 1.65 Digital supply (max) (V) 3.6
VQFN (RHF) 24 20 mm² 5 x 4
  • High Resolution:
    • SNR: 130 dB (250 SPS, PGA = 1)
  • High Accuracy:
    • THD: –122 dB
  • Low Power Consumption:
    • 18 mW (PGA = 1, 2, 4, or 8)
    • Shutdown Mode: 10 µW
  • Low-Noise PGA: 5 nV/√Hz
  • Two-Channel Input Multiplexer
  • Inherently-Stable Modulator With Fast Responding Overrange Detector
  • Flexible Digital Filter:
    • Sinc + FIR + IIR (Selectable)
    • Linear or Minimum Phase Response
    • Programmable High-Pass Filter
    • Selectable FIR Data Rates:
      250 SPS to 4 kSPS
  • Offset and Gain Calibration Engine
  • SYNC Input
  • Analog Supply: 5 V or ±2.5 V
  • Digital Supply: 1.8 V to 3.3 V
  • High Resolution:
    • SNR: 130 dB (250 SPS, PGA = 1)
  • High Accuracy:
    • THD: –122 dB
  • Low Power Consumption:
    • 18 mW (PGA = 1, 2, 4, or 8)
    • Shutdown Mode: 10 µW
  • Low-Noise PGA: 5 nV/√Hz
  • Two-Channel Input Multiplexer
  • Inherently-Stable Modulator With Fast Responding Overrange Detector
  • Flexible Digital Filter:
    • Sinc + FIR + IIR (Selectable)
    • Linear or Minimum Phase Response
    • Programmable High-Pass Filter
    • Selectable FIR Data Rates:
      250 SPS to 4 kSPS
  • Offset and Gain Calibration Engine
  • SYNC Input
  • Analog Supply: 5 V or ±2.5 V
  • Digital Supply: 1.8 V to 3.3 V

The ADS1283 is an extremely high-performance, single-chip, analog-to-digital converter (ADC) with an integrated, low-noise programmable gain amplifier (PGA) and two-channel input multiplexer (mux). The ADS1283 is suitable for the demanding needs of seismic monitoring equipment.

The converter uses a fourth-order, inherently stable, delta-sigma (ΔΣ) modulator that provides outstanding noise and linearity performance. The modulator digital output is digitally filtered and decimated by the on-chip digital filter to yield the ADC conversion result.

The flexible input mux provides an additional external input for measurement, as well as internal self-test input connections. The PGA features outstanding low noise (5 nV/√Hz) and very-high input impedance, allowing easy interfacing to geophones and hydrophones over a wide range of gains.

The digital filter provides selectable data rates from 250 to 4000 samples per second (SPS). The high-pass filter (HPF) features an adjustable corner frequency. On-chip gain and offset scaling registers support system calibration.

The synchronization input (SYNC) can be used to synchronize the conversions of multiple ADS1283 devices.

The ADS1283 is available in a compact 24-lead, 5-mm × 4-mm VQFN package, and is fully specified from –40°C to +85°C, with a maximum operating temperature range of –50°C to +125°C.

The ADS1283 is an extremely high-performance, single-chip, analog-to-digital converter (ADC) with an integrated, low-noise programmable gain amplifier (PGA) and two-channel input multiplexer (mux). The ADS1283 is suitable for the demanding needs of seismic monitoring equipment.

The converter uses a fourth-order, inherently stable, delta-sigma (ΔΣ) modulator that provides outstanding noise and linearity performance. The modulator digital output is digitally filtered and decimated by the on-chip digital filter to yield the ADC conversion result.

The flexible input mux provides an additional external input for measurement, as well as internal self-test input connections. The PGA features outstanding low noise (5 nV/√Hz) and very-high input impedance, allowing easy interfacing to geophones and hydrophones over a wide range of gains.

The digital filter provides selectable data rates from 250 to 4000 samples per second (SPS). The high-pass filter (HPF) features an adjustable corner frequency. On-chip gain and offset scaling registers support system calibration.

The synchronization input (SYNC) can be used to synchronize the conversions of multiple ADS1283 devices.

The ADS1283 is available in a compact 24-lead, 5-mm × 4-mm VQFN package, and is fully specified from –40°C to +85°C, with a maximum operating temperature range of –50°C to +125°C.
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重要文件 類型 標題 格式選項 日期
* Data sheet ADS1283 High-Resolution, Analog-to-Digital Converter datasheet (Rev. C) PDF | HTML 2019年 8月 27日
Application note Calculating Conversion Latency and System Cycle Time for Delta-Sigma ADCs (Rev. A) PDF | HTML 2024年 3月 18日
Application note QFN and SON PCB Attachment (Rev. C) PDF | HTML 2023年 12月 6日
Application note Digital Filter Types in Delta-Sigma ADCs (Rev. A) PDF | HTML 2023年 3月 29日
E-book Fundamentals of Precision ADC Noise Analysis (Rev. A) 2020年 6月 19日

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模擬型號

ADS1283 IBIS Model

SBAM368.ZIP (135 KB) - IBIS Model
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ANALOG-ENGINEER-CALC — PC software analog engineer's calculator

The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)

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ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL — The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.

The ADC-TO-VREF-SELECT tool enables the pairing of TI analog-to-digital converters (ADCs) and series voltage references. Users can select an ADC device and the desired reference voltage, and the tool will list up to two voltage reference recommendations.
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PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI 是有助於評估類比電路功能的設計和模擬環境。這款全功能設計和模擬套件使用 Cadence® 的類比分析引擎。PSpice for TI 包括業界最大的模型庫之一，涵蓋我們的類比和電源產品組合，以及特定類比行為模型，且使用無需支付費用。

PSpice for TI 設計和模擬環境可讓您使用其內建函式庫來模擬複雜的混合訊號設計。在進行佈局和製造之前，建立完整的終端設備設計和解決方案原型，進而縮短上市時間並降低開發成本。 

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TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
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