產品詳細資料

Resolution (Bits) 16 Sample rate (max) (ksps) 2500 Number of input channels 1 Interface type Enhanced SPI, SPI Architecture SAR Input type Differential Rating Catalog Reference mode External Input voltage range (max) (V) 5 Input voltage range (min) (V) 0 Features Daisy-Chainable, Oscillator Operating temperature range (°C) -40 to 125 Power consumption (typ) (mW) 15 Analog supply voltage (min) (V) 1.65 Analog supply voltage (max) (V) 1.95 SNR (dB) 96 Digital supply (min) (V) 1.65 Digital supply (max) (V) 1.95
Resolution (Bits) 16 Sample rate (max) (ksps) 2500 Number of input channels 1 Interface type Enhanced SPI, SPI Architecture SAR Input type Differential Rating Catalog Reference mode External Input voltage range (max) (V) 5 Input voltage range (min) (V) 0 Features Daisy-Chainable, Oscillator Operating temperature range (°C) -40 to 125 Power consumption (typ) (mW) 15 Analog supply voltage (min) (V) 1.65 Analog supply voltage (max) (V) 1.95 SNR (dB) 96 Digital supply (min) (V) 1.65 Digital supply (max) (V) 1.95
VQFN (RGE) 24 16 mm² (4 mm × 4 mm)
  • Sample Rate: 2.5MSPS
  • No Latency Output
  • Excellent DC and AC Performance:
    • INL: ±0.25LSB
    • DNL: ±0.6LSB
    • SNR: 96dB, THD: –118dB
  • Wide Input Range:
    • Unipolar Differential Input Range: ±VREF
    • VREF Input Range: 2.5V to 5V, Independent of AVDD
  • Low-Power Dissipation:
    • 9mW at 2.5MSPS (AVDD Only)
    • 15.5mW at 2.5MSPS (Total)
    • Flexible Low-Power Modes Enable Power Scaling with Throughput
  • Enhanced-SPI ( multiSPI™) Digital Interface
  • JESD8-7A-Compliant Digital I/O at 1.8V DVDD
  • Fully-Specified Over Extended Temperature Range: –40°C to +125°C
  • Small Footprint: 4mm × 4mm VQFN
  • Sample Rate: 2.5MSPS
  • No Latency Output
  • Excellent DC and AC Performance:
    • INL: ±0.25LSB
    • DNL: ±0.6LSB
    • SNR: 96dB, THD: –118dB
  • Wide Input Range:
    • Unipolar Differential Input Range: ±VREF
    • VREF Input Range: 2.5V to 5V, Independent of AVDD
  • Low-Power Dissipation:
    • 9mW at 2.5MSPS (AVDD Only)
    • 15.5mW at 2.5MSPS (Total)
    • Flexible Low-Power Modes Enable Power Scaling with Throughput
  • Enhanced-SPI ( multiSPI™) Digital Interface
  • JESD8-7A-Compliant Digital I/O at 1.8V DVDD
  • Fully-Specified Over Extended Temperature Range: –40°C to +125°C
  • Small Footprint: 4mm × 4mm VQFN

The ADS9120 is a 16-bit, 2.5MSPS, successive approximation register (SAR) analog-to-digital converter (ADC) with enhanced performance features. The high throughput enables developers to oversample the input signal to improve dynamic range and accuracy of the measurement. The ADS9110 is a pin-compatible, 18-bit, 2MSPS variant of the ADS9120.

The ADS9120 boosts analog performance while maintaining high-resolution data transfer by using TI’s enhanced SPI feature. Enhanced SPI enables the ADS9120 to achieve high throughput at lower clock speeds, thereby simplifying board layout and lowering system cost.

Enhanced SPI also simplifies the host clocking-in of data, thereby making the device ideal for applications involving FPGAs and DSPs. The ADS9120 is compatible with a standard SPI Interface. The ADS9120 has an internal data parity feature that can be appended to the ADC data output. ADC data validation by the host, using parity bits, improves system reliability.

The device supports JESD8-7A compliant I/Os, the extended industrial temperature range, and is offered in a space-saving, 4mm × 4mm, VQFN package.

The ADS9120 is a 16-bit, 2.5MSPS, successive approximation register (SAR) analog-to-digital converter (ADC) with enhanced performance features. The high throughput enables developers to oversample the input signal to improve dynamic range and accuracy of the measurement. The ADS9110 is a pin-compatible, 18-bit, 2MSPS variant of the ADS9120.

The ADS9120 boosts analog performance while maintaining high-resolution data transfer by using TI’s enhanced SPI feature. Enhanced SPI enables the ADS9120 to achieve high throughput at lower clock speeds, thereby simplifying board layout and lowering system cost.

Enhanced SPI also simplifies the host clocking-in of data, thereby making the device ideal for applications involving FPGAs and DSPs. The ADS9120 is compatible with a standard SPI Interface. The ADS9120 has an internal data parity feature that can be appended to the ADC data output. ADC data validation by the host, using parity bits, improves system reliability.

The device supports JESD8-7A compliant I/Os, the extended industrial temperature range, and is offered in a space-saving, 4mm × 4mm, VQFN package.

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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 ADS9120 16-Bit, 2.5MSPS, 15.5mW, SAR ADC With Enhanced Performance Features datasheet (Rev. B) PDF | HTML 2026/4/6
應用說明 Attenuator Amplifier Design to Maximize the Input Voltage of Differential ADCs 2018/6/14
Application brief Improving Input Settling for Precision Data Converters 2017/12/12
Application brief Optimizing Data Transfer on High-Resolution, High-Throughput Data Converters 2017/12/12
Application brief Simplify Isolation Designs Using an Enhanced-SPI ADC Interface 2017/12/11
白皮書 Enabling Faster, Smarter, and More Robust Solutions for SAR ADSx With multiSPI 2016/11/8
白皮書 Voltage-reference impact on total harmonic distortion 2016/8/1

設計與開發

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開發板

ADS9120EVM-PDK — ADS9120 16 位元 2.5 MSPS、15.5mW SAR ADC EVM 性能展示套件 (PDK)

ADS9120 評估模組 (EVM) 性能展示套件 (PDK) 是用於評估 ADS9120 連續近似暫存器類比轉數位轉換器 (SAR ADC) 效能的平台。ADS9120EVM-PDK 包含 ADS9120 EVM 板、PHI 控制器電路板,以及隨附的電腦軟體,可讓使用者透過通用序列匯流排 (USB) 與 ADC 通訊、擷取資料,以及執行資料分析。

使用指南: PDF
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開發模組 (EVM) 的 GUI

SBAC154 — ADS9120EVM-PDK GUI

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模擬型號

ADS9120 IBIS Model

SBAM297.ZIP (12 KB) - IBIS 模型
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模擬型號

ADS9120 TINA-TI Reference Design

SBAM299.TSC (7032 KB) - TINA-TI 參考設計
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模擬型號

ADS9120 TINA-TI Spice Model

SBAM298.TSM (48 KB) - TINA-TI Spice 模型
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模擬型號

Impedance Spectroscopy TINA-TI Reference Design (Differential)

SBOMBM0 (94 KB) - TINA-TI 參考設計
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計算工具

ANALOG-ENGINEER-CALC — PC software analog engineer's calculator

類比工程師的計算機旨在加速類比電路設計工程師定期使用的許多重複計算。此基於 PC 的工具提供圖形介面,列出各種常見計算,從使用回饋電阻器設定運算放大器增益到選擇適當的電路設計元件以穩定類比數位轉換器 (ADC) 驅動緩衝電路。

除了作為獨立工具使用外,此計算機還與類比工程師口袋參考中描述的概念相得益彰。

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設計工具

ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL — The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.

The ADC-TO-VREF-SELECT tool enables the pairing of TI analog-to-digital converters (ADCs) and series voltage references. Users can select an ADC device and the desired reference voltage, and the tool will list up to two voltage reference recommendations.
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VQFN (RGE) 24 Ultra Librarian

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