首頁 數據轉換器 類比轉數位轉換器 (ADC) 高速 ADC (≥10 MSPS)
首頁
數據轉換器
類比轉數位轉換器 (ADC)
高速 ADC (≥10 MSPS)

ADS4128

現行

12 位元 200-MSPS 類比轉數位轉換器 (ADC)

立即訂購
產品規格表

ADS4128

現行
產品規格表 立即訂購

產品詳細資料

Sample rate (max) (Msps) 200 Resolution (Bits) 12 Number of input channels 1 Interface type DDR LVDS, Parallel CMOS Analog input BW (MHz) 800 Features Low Power Rating Catalog Peak-to-peak input voltage range (V) 2 Power consumption (typ) (mW) 212 Architecture Pipeline SNR (dB) 70 ENOB (Bits) 11.2 SFDR (dB) 87 Operating temperature range (°C) -40 to 85 Input buffer No
Sample rate (max) (Msps) 200 Resolution (Bits) 12 Number of input channels 1 Interface type DDR LVDS, Parallel CMOS Analog input BW (MHz) 800 Features Low Power Rating Catalog Peak-to-peak input voltage range (V) 2 Power consumption (typ) (mW) 212 Architecture Pipeline SNR (dB) 70 ENOB (Bits) 11.2 SFDR (dB) 87 Operating temperature range (°C) -40 to 85 Input buffer No
VQFN (RGZ) 48 49 mm² 7 x 7
  • Maximum Sample Rate: 200 MSPS
  • Ultralow Power with 1.8-V Single Supply:
    • 230-mW Total Power at 200 MSPS
  • High Dynamic Performance:
    • SNR: 69 dBFS at 170 MHz
    • SFDR: 85 dBc at 170 MHz
  • Dynamic Power Scaling With Sample Rate
  • Output Interface:
    • Double Data Rate (DDR) LVDS with
      Programmable Swing and Strength
      • Standard Swing: 350 mV
      • Low Swing: 200 mV
      • Default Strength: 100-Ω Termination
      • 2× Strength: 50-Ω Termination
    • 1.8-V Parallel CMOS Interface Also Supported
  • Programmable Gain up to 6 dB for SNR and

    SFDR Trade-Off
  • DC Offset Correction
  • Supports Low Input Clock Amplitude Down to 200
    mVPP
  • Package: 7.00 mm × 7.00 mm VQFN-48
  • Maximum Sample Rate: 200 MSPS
  • Ultralow Power with 1.8-V Single Supply:
    • 230-mW Total Power at 200 MSPS
  • High Dynamic Performance:
    • SNR: 69 dBFS at 170 MHz
    • SFDR: 85 dBc at 170 MHz
  • Dynamic Power Scaling With Sample Rate
  • Output Interface:
    • Double Data Rate (DDR) LVDS with
      Programmable Swing and Strength
      • Standard Swing: 350 mV
      • Low Swing: 200 mV
      • Default Strength: 100-Ω Termination
      • 2× Strength: 50-Ω Termination
    • 1.8-V Parallel CMOS Interface Also Supported
  • Programmable Gain up to 6 dB for SNR and

    SFDR Trade-Off
  • DC Offset Correction
  • Supports Low Input Clock Amplitude Down to 200
    mVPP
  • Package: 7.00 mm × 7.00 mm VQFN-48

The ADS4128 is a 12-bit analog-to-digital converter (ADC) with sampling rates up to 200 MSPS. This device uses innovative design techniques to achieve high dynamic performance, while consuming extremely low power at 1.8-V supply. The device is well-suited for multi-carrier, wide-bandwidth communications applications.

The ADS4128 has fine-gain options that can be used to improve SFDR performance at lower full-scale input ranges, especially at high input frequencies. It includes a dc offset correction loop that can be used to cancel the ADC offset. At lower sampling rates, the ADC automatically operates at scaled-down power with no loss in performance.

The ADS4128 is available in a compact VQFN-48 package and is specified over the industrial temperature range (–40°C to 85°C).

The ADS4128 is a 12-bit analog-to-digital converter (ADC) with sampling rates up to 200 MSPS. This device uses innovative design techniques to achieve high dynamic performance, while consuming extremely low power at 1.8-V supply. The device is well-suited for multi-carrier, wide-bandwidth communications applications.

The ADS4128 has fine-gain options that can be used to improve SFDR performance at lower full-scale input ranges, especially at high input frequencies. It includes a dc offset correction loop that can be used to cancel the ADC offset. At lower sampling rates, the ADC automatically operates at scaled-down power with no loss in performance.

The ADS4128 is available in a compact VQFN-48 package and is specified over the industrial temperature range (–40°C to 85°C).
filter 尋找其它 高速 ADC (≥10 MSPS)
下載 觀看有字幕稿的影片 影片

技術文件

star =TI 所選的此產品重要文件
找不到結果。請清除您的搜尋條件，然後再試一次。
檢視所有 4
重要文件 類型 標題 格式選項 日期
* Data sheet ADS4128 12-Bit, 200-MSPS, Ultralow-Power ADC datasheet (Rev. A) PDF | HTML 2016年 4月 4日
Application note Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A) 2015年 5月 22日
Application note Why Use Oversampling when Undersampling Can Do the Job? (Rev. A) 2013年 7月 19日
User guide Interfacing Altera FPGAs to ADS4249 and DAC3482 (TIDA-00069 Reference Guide) 2012年 7月 10日

設計與開發

如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。

模擬型號

ADS4128 IBIS Model

SBAM161.ZIP (164 KB) - IBIS Model
下載
計算工具

ANALOG-ENGINEER-CALC — PC software analog engineer's calculator

The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)

支援產品和硬體

支援產品和硬體
啟動 下載
設計工具

SBAC119 — TIGAR (Texas Instruments Graphical Evaluation of ADC Response Tool)

支援產品和硬體

支援產品和硬體
下載
模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI 是有助於評估類比電路功能的設計和模擬環境。這款全功能設計和模擬套件使用 Cadence® 的類比分析引擎。PSpice for TI 包括業界最大的模型庫之一，涵蓋我們的類比和電源產品組合，以及特定類比行為模型，且使用無需支付費用。

PSpice for TI 設計和模擬環境可讓您使用其內建函式庫來模擬複雜的混合訊號設計。在進行佈局和製造之前，建立完整的終端設備設計和解決方案原型，進而縮短上市時間並降低開發成本。 

在 PSpice for TI 設計與模擬工具中，您可以搜尋 TI (...)
要求
封裝 針腳 CAD 符號、佔位空間與 3D 模型
VQFN (RGZ) 48 Ultra Librarian
適用 TI 的評估品項標準條款與條件。

訂購與品質

內含資訊：
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中的可靠性監測
內含資訊：
  • 晶圓廠位置
  • 組裝地點

建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。

支援與培訓

內含 TI 工程師技術支援的 TI E2E™ 論壇

以英文檢視所有論壇主題

內容係由 TI 和社群貢獻者依「現狀」提供，且不構成 TI 規範。檢視使用條款。

若有關於品質、封裝或訂購 TI 產品的問題，請參閱 TI 支援。​​​​​​​​​​​​​​

影片