ADS8339
- Sample Rate: 250 kHz
- 16-Bit Resolution
- Zero Latency at Full Speed
- Unipolar Single-Ended Input Range:
- 0 V to Vref
- SPI™-Compatible Serial Interface with Daisy-Chain Option
- Uses Internal Clock for Conversion
- Excellent Performance:
- 93.6 dB SNR (typ) at 10-kHz Input
- –106 dB THD (typ) at 10-kHz Input
- ±2.0 LSB INL (max)
- ±1.0 LSB DNL (max)
- Low-Power Dissipation:
- 17.5 mW (typ) at 250 kSPS
- Power Scales Linearly with Speed:
- 1.75 mW at 25 kSPS
- Power Dissipation During Power-Down State:
- 0.25 µW (typ)
- Package: VSSOP-10
The ADS8339 is a 16-bit, 250-kSPS, analog-to-digital converter (ADC). The device operates with a 2.25-V to 5.5-V external reference. The device includes a capacitor-based, successive-approximation register (SAR) ADC with an inherent sample-and-hold circuit.
The device includes a 25-MHz, SPI-compatible serial interface. The interface is designed to support daisy-chaining or cascading of multiple devices. Furthermore, a busy indicator makes synchronizing with the digital host easy. The unipolar, single-ended input range for the device supports an input swing of 0 V to Vref.
The device is optimized for low-power operation and power consumption scales directly with speed. This feature makes the device attractive for lower speed applications. The ADS8339 is available in a VSSOP-10 package.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | ADS8339 16-Bit, 250-kSPS, Serial Interface, Micro-Power, Miniature, SAR Analog-to-Digital Converter datasheet (Rev. A) | PDF | HTML | 2014/7/28 | ||
| Circuit design | Circuit for protecting low-voltage SAR ADC from electrical overstress with minim (Rev. A) | PDF | HTML | 2024/9/19 | |||
| 白皮書 | Voltage-reference impact on total harmonic distortion | 2016/8/1 | ||||
| 電子書 | Best of Baker's Best: Precision Data Converters -- SAR ADCs | 2015/5/21 |
設計與開發
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ADS8339EVM-PDK — ADS8339 16 位元、250-kSPS、微型 SAR ADC 評估模組性能展示套件 (PDK)
The ADS8339EVM-PDK is designed to evaluate the ADS8339 analog-to-digital converter (ADC). The converter is a 16 bit pseudo differential unipolar Successive-Approximation-Register (SAR) ADC with a maximum throughput of 250KSPS. The EVM includes input and reference drivers enabling the ADC to work (...)
ANALOG-ENGINEER-CALC — PC software analog engineer's calculator
類比工程師的計算機旨在加速類比電路設計工程師定期使用的許多重複計算。此基於 PC 的工具提供圖形介面,列出各種常見計算,從使用回饋電阻器設定運算放大器增益到選擇適當的電路設計元件以穩定類比數位轉換器 (ADC) 驅動緩衝電路。
除了作為獨立工具使用外,此計算機還與類比工程師口袋參考中描述的概念相得益彰。
ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL — The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| VSSOP (DGS) | 10 | Ultra Librarian |
訂購與品質
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。