ADS8883
- Sample Rate: 680 kHz
- No Latency Output
- Unipolar, True-Differential Input Range:
–VREF to +VREF - Wide Common-Mode Voltage Range:
0 V to VREF with 90-dB CMRR (min) - SPI™-Compatible Serial Interface with
Daisy-Chain Option - Excellent AC and DC Performance:
- SNR: 100 dB, THD: –115 dB
- INL: ±1.5 LSB (typ), ±3.0 LSB (max)
- DNL: +1.5 and –1 LSB (max), 18-Bit NMC
- Wide Operating Range:
- AVDD: 2.7 V to 3.6 V
- DVDD: 1.65 V to 3.6 V
(Independent of AVDD) - REF: 2.5 V to 5 V (Independent of AVDD)
- Operating Temperature: –40°C to +85°C
- Low-Power Dissipation:
- 4.2 mW at 680 kSPS
- 0.6 mW at 100 kSPS
- 60 µW at 10 kSPS
- Power-Down Current (AVDD): 50 nA
- Full-Scale Step Settling to 18 Bits: 540 ns
- Packages: MSOP-10 and SON-10
The ADS8883 is an 18-bit, 680-kSPS, true-differential input, analog-to-digital converter (ADC). The device operates with a 2.5-V to 5-V external reference, offering a wide selection of signal ranges without additional input signal scaling. The reference voltage setting is independent of, and can exceed, the analog supply voltage (AVDD).
The device offers an SPI-compatible serial interface that also supports daisy-chain operation for cascading multiple devices. An optional busy-indicator bit makes synchronizing with the digital host easy.
The device supports unipolar, true-differential analog input signals with a differential input swing of –VREF to +VREF. This true-differential analog input structure allows for a common-mode voltage of any value in the range of 0 V to +VREF (when both inputs are within the operating input range of –0.1 V to VREF + 0.1 V).
Device operation is optimized for very low-power operation. Power consumption directly scales with speed. This feature makes the ADS8883 excellent for lower-speed applications.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | 18-Bit, 680-kSPS, Serial Interface, microPower, Miniature, True-Differential Inp datasheet (Rev. A) | 2013/12/17 | |||
| Circuit design | Circuit for protecting low-voltage SAR ADC from electrical overstress with minim (Rev. A) | PDF | HTML | 2024/9/19 | |||
| 白皮書 | Voltage-reference impact on total harmonic distortion | 2016/8/1 | ||||
| 電子書 | Best of Baker's Best: Precision Data Converters -- SAR ADCs | 2015/5/21 |
設計與開發
如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。
ANALOG-ENGINEER-CALC — PC software analog engineer's calculator
類比工程師的計算機旨在加速類比電路設計工程師定期使用的許多重複計算。此基於 PC 的工具提供圖形介面,列出各種常見計算,從使用回饋電阻器設定運算放大器增益到選擇適當的電路設計元件以穩定類比數位轉換器 (ADC) 驅動緩衝電路。
除了作為獨立工具使用外,此計算機還與類比工程師口袋參考中描述的概念相得益彰。
ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL — The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| VSSOP (DGS) | 10 | Ultra Librarian |
| VSON (DRC) | 10 | Ultra Librarian |
訂購與品質
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。