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INA351

現行

具有整合式參考緩衝器的微型 (1.5 mm×2 mm)、低功耗 (110 µA) 儀表放大器

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產品規格表

INA351

現行
產品規格表 立即訂購

產品詳細資料

Number of channels 1 Vs (max) (V) 5.5 Vs (min) (V) 1.8 Input offset (±) (max) (µV) 1300 Voltage gain (min) (V/V) 10 Voltage gain (max) (V/V) 50 Noise at 1 kHz (typ) (nV√Hz) 36 Features Cost Optimized, Low power, Shutdown, Small Size CMRR (min) (dB) 86 Iq (typ) (mA) 0.11 Bandwidth at min gain (typ) (MHz) 0.1 Gain error (±) (max) (%) 0.1 Operating temperature range (°C) -40 to 125 Rating Catalog Output swing headroom (to negative supply) (typ) (V) 0.015 Output swing headroom (to positive supply) (typ) (V) 0.015 Input common mode headroom (to negative supply) (typ) (V) 0 Input common mode headroom (to positive supply) (typ) (V) 0 Noise at 0.1 Hz to 10 Hz (typ) (µVPP) 3.2
Number of channels 1 Vs (max) (V) 5.5 Vs (min) (V) 1.8 Input offset (±) (max) (µV) 1300 Voltage gain (min) (V/V) 10 Voltage gain (max) (V/V) 50 Noise at 1 kHz (typ) (nV√Hz) 36 Features Cost Optimized, Low power, Shutdown, Small Size CMRR (min) (dB) 86 Iq (typ) (mA) 0.11 Bandwidth at min gain (typ) (MHz) 0.1 Gain error (±) (max) (%) 0.1 Operating temperature range (°C) -40 to 125 Rating Catalog Output swing headroom (to negative supply) (typ) (V) 0.015 Output swing headroom (to positive supply) (typ) (V) 0.015 Input common mode headroom (to negative supply) (typ) (V) 0 Input common mode headroom (to positive supply) (typ) (V) 0 Noise at 0.1 Hz to 10 Hz (typ) (µVPP) 3.2
SOT-23-THN (DDF) 8 8.12 mm² 2.9 x 2.8 WSON (DSG) 8 4 mm² 2 x 2 X2QFN (RUG) 10 3 mm² 1.5 x 2
  • Designed for size, cost, and power conscious applications
  • Selectable gain options with integrated reference buffer
    • G = 10 or G = 20 (INA351ABS)
    • G = 30 or G = 50 (INA351CDS)
  • Space saving ultra-small package options
    • 10-pin X2QFN (RUG) – 3mm2
    • 8-pin WSON (DSG) – 4mm2
    • 8-pin SOT23-THN (DDF) – 4.64mm2
  • Optimized performance for 10-bit to 14-bit systems
    • CMRR: 95dB (typical) across all gains
    • Offset voltage: 0.2mV (typical) across all gains
    • Gain error (typical):
      • 0.015% for G = 10, G = 50
      • 0.020% for G = 20, G = 30
  • Bandwidth: 100kHz for G = 10 (typical)
  • Drives 500pF with less than 20% overshoot (typical)
  • Optimized quiescent current: 110µA (typical)
  • Shutdown option for power conscious applications
  • Supply range: 1.8V (±0.9V) to 5.5V (±2.75V)
  • Specified temperature range: –40°C to 125°C
  • Designed for size, cost, and power conscious applications
  • Selectable gain options with integrated reference buffer
    • G = 10 or G = 20 (INA351ABS)
    • G = 30 or G = 50 (INA351CDS)
  • Space saving ultra-small package options
    • 10-pin X2QFN (RUG) – 3mm2
    • 8-pin WSON (DSG) – 4mm2
    • 8-pin SOT23-THN (DDF) – 4.64mm2
  • Optimized performance for 10-bit to 14-bit systems
    • CMRR: 95dB (typical) across all gains
    • Offset voltage: 0.2mV (typical) across all gains
    • Gain error (typical):
      • 0.015% for G = 10, G = 50
      • 0.020% for G = 20, G = 30
  • Bandwidth: 100kHz for G = 10 (typical)
  • Drives 500pF with less than 20% overshoot (typical)
  • Optimized quiescent current: 110µA (typical)
  • Shutdown option for power conscious applications
  • Supply range: 1.8V (±0.9V) to 5.5V (±2.75V)
  • Specified temperature range: –40°C to 125°C

The INA351 is a selectable-gain instrumentation amplifier with integrated reference buffer that offers four gain options across the INA351ABS and INA351CDS variants available in small packages. The INA351ABS has gain options of 10 or 20 and the INA351CDS has gain options of 30 or 50. These gain options can be selected by toggling the gain select (GS) pin. The INA351 is an excellent choice for bridge-type sensing and for differential to single-ended conversion applications.

Built with precision matched integrated resistors, the INA351 saves on BOM costs, pick-and-place machine handling costs, and board space by removing the need for precise or closely-matched external resistors. The INA351 can interface directly to low-speed, 10-bit to 14-bit, analog-to-digital converters (ADCs) and is an excellent choice for replacing discrete implementation of instrumentation amplifiers built with commodity amplifiers and discrete resistors.

Designed with the three-amplifier architecture, the INA351 is optimized for delivering performance. The device achieves 86dB of minimum CMRR and an accurate 0.1% of maximum gain error, along with 1.3mV of maximum offset across all gain options, while consuming just 135µA of maximum quiescent current. The INA351 has an integrated shutdown option to turn off the amplifier when idle for additional power savings in battery-powered applications.

The INA351 is a selectable-gain instrumentation amplifier with integrated reference buffer that offers four gain options across the INA351ABS and INA351CDS variants available in small packages. The INA351ABS has gain options of 10 or 20 and the INA351CDS has gain options of 30 or 50. These gain options can be selected by toggling the gain select (GS) pin. The INA351 is an excellent choice for bridge-type sensing and for differential to single-ended conversion applications.

Built with precision matched integrated resistors, the INA351 saves on BOM costs, pick-and-place machine handling costs, and board space by removing the need for precise or closely-matched external resistors. The INA351 can interface directly to low-speed, 10-bit to 14-bit, analog-to-digital converters (ADCs) and is an excellent choice for replacing discrete implementation of instrumentation amplifiers built with commodity amplifiers and discrete resistors.

Designed with the three-amplifier architecture, the INA351 is optimized for delivering performance. The device achieves 86dB of minimum CMRR and an accurate 0.1% of maximum gain error, along with 1.3mV of maximum offset across all gain options, while consuming just 135µA of maximum quiescent current. The INA351 has an integrated shutdown option to turn off the amplifier when idle for additional power savings in battery-powered applications.
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重要文件 類型 標題 格式選項 日期
* Data sheet INA351 Cost and Size Optimized, Low Power, 1.8V to 5.5V Selectable Gain Instrumentation Amplifier with Integrated Reference Buffer datasheet (Rev. D) PDF | HTML 2024年 11月 19日
Product overview Small-Size INA35x Versus Discrete Instrumentation Amps (Rev. A) PDF | HTML 2023年 1月 31日
Product overview Bridge Sensor Solution (Rev. A) PDF | HTML 2023年 1月 27日

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開發板

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INA-DDF-EVM 是採 DDF 封裝，且與各種儀器放大器 (IA) 相容的評估模組 (EVM)。其旨在評估單電源和雙電源配置的裝置性能。
使用指南: PDF | HTML
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開發板

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SMALL-AMP-DIP-EVM 提供快速簡易方式，與許多業界標準小型封裝進行介接，因而加速小型封裝運算放大器原型設計。SMALL-AMP-DIP-EVM 支援八個小型封裝選項，包括 DPW-5 (X2SON)、DSG-8 (WSON)、DCN-8 (SOT)、DDF-8 (SOT)、RUG-10 (X2QFN)、RUC-14 (X2QFN)、RGY-14 (VQFN) 和 RTE-16 (WQFN)。

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模擬型號

INA351_G10 PSpice Model

SBOMCD0.ZIP (41 KB) - PSpice Model
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模擬型號

INA351_G10 TINA-TI Reference Design

SBOMCD4.TSC (51 KB) - TINA-TI Reference Design
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模擬型號

INA351_G10 TINA-TI Spice Model

SBOMCD2.ZIP (5 KB) - TINA-TI Spice Model
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模擬型號

INA351_G20 PSpice Model

SBOMCD1.ZIP (48 KB) - PSpice Model
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模擬型號

INA351_G20 TINA-TI Reference Design

SBOMCD5.TSC (51 KB) - TINA-TI Reference Design
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INA351_G20 TINA-TI Spice Model

SBOMCD3.ZIP (5 KB) - TINA-TI Spice Model
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模擬型號

INA351_G30 PSpice Model

SBOMCC4.ZIP (59 KB) - PSpice Model
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模擬型號

INA351_G30 TINA-TI Reference Design

SBOMCC8.TSC (51 KB) - TINA-TI Reference Design
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模擬型號

INA351_G30 TINA-TI Spice Model

SBOMCC6.ZIP (5 KB) - TINA-TI Spice Model
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模擬型號

INA351_G50 PSpice Model

SBOMCC5.ZIP (47 KB) - PSpice Model
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模擬型號

INA351_G50 TINA-TI Reference Design

SBOMCC9.TSC (51 KB) - TINA-TI Reference Design
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模擬型號

INA351_G50 TINA-TI Spice Model

SBOMCC7.ZIP (5 KB) - TINA-TI Spice Model
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計算工具

ANALOG-ENGINEER-CALC — PC software analog engineer's calculator

The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)

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PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI 是有助於評估類比電路功能的設計和模擬環境。這款全功能設計和模擬套件使用 Cadence® 的類比分析引擎。PSpice for TI 包括業界最大的模型庫之一，涵蓋我們的類比和電源產品組合，以及特定類比行為模型，且使用無需支付費用。

PSpice for TI 設計和模擬環境可讓您使用其內建函式庫來模擬複雜的混合訊號設計。在進行佈局和製造之前，建立完整的終端設備設計和解決方案原型，進而縮短上市時間並降低開發成本。 

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封裝 針腳 CAD 符號、佔位空間與 3D 模型
SOT-23-THN (DDF) 8 Ultra Librarian
WSON (DSG) 8 Ultra Librarian
X2QFN (RUG) 10 Ultra Librarian
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