ADS5424
- 14 Bit Resolution
- 105 MSPS Maximum Sample Rate
- SNR = 74 dBc at 105 MSPS and 50-MHz IF
- SFDR = 93 dBc at 105 MSPS and 50-MHz IF
- 2.2 Vpp Differential Input Range
- 5 V Supply Operation
- 3.3 V CMOS Compatible Outputs
- 1.9 W Total Power Dissipation
- 2s Complement Output Format
- On-Chip Input Analog Buffer, Track and Hold, and Reference Circuit
- 52 Pin HTQFP Package With Exposed Heatsink
- Pin Compatible to the AD6644/45
- Industrial Temperature Range = –40°C to 85°C
- APPLICATIONS
- Single and Multichannel Digital Receivers
- Base Station Infrastructure
- Instrumentation
- Video and Imaging
- RELATED DEVICES
- Clocking: CDC7005
- Amplifiers: OPA695, THS4509
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All other trademarks are the property of their respective owners.
The ADS5424 is a 14 bit 105 MSPS analog-to-digital converter (ADC) that operates from a 5 V supply, while providing 3.3 V CMOS compatible digital outputs. The ADS5424 input buffer isolates the internal switching of the on-chip Track and Hold (T & H) from disturbing the signal source. An internal reference generator is also provided to further simplify the system design. The ADS5424 has outstanding low noise and linearity, over input frequency. With only a
2.2 VPP input range, simplifies the design of multicarrier applications, where the carriers are selected on the digital domain.
The ADS5424 is available in a 52 pin HTQFP with heatsink package and is pin compatible to the AD6645. The ADS5424 is built on state of the art Texas Instruments complementary bipolar process (BiCom3) and is specified over full industrial temperature range (–40°C to 85°C).
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | 14-Bit, 105 MSPS Analog-to-Digital Converter datasheet (Rev. B) | 2010/1/14 | |||
| 應用說明 | Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A) | 2015/5/22 | ||||
| 應用說明 | Why Use Oversampling when Undersampling Can Do the Job? (Rev. A) | 2013/7/19 | ||||
| 白皮書 | ADS5424 ICS Radiation Test Results | 2012/3/28 | ||||
| 應用說明 | High-Speed, Analog-to-Digital Converter Basics | 2012/1/11 | ||||
| 應用說明 | Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) | 2010/9/10 | ||||
| 應用說明 | Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio | 2009/4/28 | ||||
| 應用說明 | CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters | 2008/6/8 | ||||
| 應用說明 | Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 | 2008/6/2 | ||||
| 類比設計期刊 | Understanding and comparing datasheets for high-speed ADCs | 2006/2/13 | ||||
| 類比設計期刊 | Low-power, high-intercept interface to the ADS5424, 105-MSPS converter | 2005/10/10 | ||||
| 類比設計期刊 | Clocking High-Speed Data Converters | 2005/1/18 |
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| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
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