SWCU192 November 2021 CC1312R7 , CC1352P7 , CC2652P7 , CC2652R7
Each data frame is between 4 and 16 bits long, depending on the size of data programmed, and is transmitted starting with the most significant bit (MSB). The following three basic frame types can be selected:
For all three formats, the serial clock (SSIn_CLK) is held inactive while the SSI is idle and SSIn_CLK transitions at the programmed frequency only during active transmission or reception of data. The IDLE state of SSIn_CLK provides a receive time-out indication that occurs when the RX FIFO still contains data after a time-out period.
For Motorola SPI and MICROWIRE frame formats, the serial frame (SSIn_FSS) pin is active low and is asserted (pulled down) during the entire transmission of the frame.
For TI synchronous serial frame format, the SSIn_FSS pin is pulsed for one serial clock period which starts at its rising edge before the transmission of each frame. For this frame format, both the SSI and the off-chip slave device drive their output data on the rising edge of SSIn_CLK and latch data from the other device on the falling edge.
Unlike the full-duplex transmission of the other two frame formats, the MICROWIRE format uses a special master-slave messaging technique that operates at half-duplex. When a frame begins, an 8-bit control message is transmitted to the off-chip slave. No incoming data is received by the SSI during this transmission. After the message is sent, the off-chip slave decodes it and responds with the requested data after waiting one serial clock after the last bit of the 8-bit control message is sent. The returned data can be 4 to 16 bits long, making the total frame length anywhere from 13 to 25 bits.