SWCU192 November   2021 CC1312R7 , CC1352P7 , CC2652P7 , CC2652R7

 

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    9.     402
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  14.   404
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    4.     448
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    5.     454
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  16.   456
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    3.     459
      1.      460
      2.      461
        1.       462
        2.       463
        3.       464
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        5.       466
      3.      467
      4.      468
    4.     469
      1.      470
      2.      471
      3.      472
      4.      473
      5.      474
    5.     475
      1.      476
  17.   477
    1.     478
    2.     479
      1.      480
      2.      481
      3.      482
        1.       483
      4.      484
    3.     485
      1.      486
      2.      487
      3.      488
    4.     489
      1.      490
  18.   491
    1.     492
    2.     493
    3.     494
    4.     495
      1.      496
  19.   497
    1.     498
    2.     499
    3.     500
    4.     501
    5.     502
      1.      503
      2.      504
      3.      505
    6.     506
      1.      507
        1.       508
        2.       509
        3.       510
          1.        511
          2.        512
    7.     513
      1.      514
  20.   515
    1.     516
      1.      517
    2.     518
      1.      519
        1.       520
      2.      521
        1.       522
        2.       523
      3.      524
      4.      525
    3.     526
      1.      527
        1.       528
        2.       529
        3.       530
        4.       531
      2.      532
        1.       533
          1.        534
        2.       535
          1.        536
          2.        537
        3.       538
          1.        539
        4.       540
          1.        541
          2.        542
          3.        543
        5.       544
        6.       545
        7.       546
        8.       547
        9.       548
        10.       549
    4.     550
      1.      551
        1.       552
      2.      553
        1.       554
        2.       555
          1.        556
          2.        557
          3.        558
          4.        559
          5.        560
      3.      561
        1.       562
        2.       563
        3.       564
      4.      565
        1.       566
        2.       567
          1.        568
          2.        569
          3.        570
      5.      571
        1.       572
        2.       573
          1.        574
          2.        575
          3.        576
          4.        577
            1.         578
            2.         579
          5.        580
          6.        581
        3.       582
          1.        583
          2.        584
          3.        585
            1.         586
            2.         587
            3.         588
            4.         589
          4.        590
      6.      591
        1.       592
        2.       593
      7.      594
        1.       595
        2.       596
          1.        597
          2.        598
          3.        599
          4.        600
          5.        601
            1.         602
              1.          603
            2.         604
              1.          605
            3.         606
              1.          607
          6.        608
    5.     609
      1.      610
        1.       611
        2.       612
      2.      613
        1.       614
        2.       615
          1.        616
          2.        617
          3.        618
          4.        619
          5.        620
          6.        621
          7.        622
          8.        623
      3.      624
        1.       625
        2.       626
          1.        627
          2.        628
          3.        629
          4.        630
      4.      631
        1.       632
        2.       633
          1.        634
          2.        635
          3.        636
            1.         637
            2.         638
      5.      639
        1.       640
        2.       641
          1.        642
          2.        643
          3.        644
            1.         645
            2.         646
            3.         647
          4.        648
            1.         649
            2.         650
            3.         651
            4.         652
          5.        653
          6.        654
      6.      655
        1.       656
        2.       657
          1.        658
          2.        659
          3.        660
          4.        661
          5.        662
    6.     663
      1.      664
        1.       665
        2.       666
          1.        667
            1.         668
            2.         669
      2.      670
      3.      671
      4.      672
      5.      673
      6.      674
      7.      675
    7.     676
    8.     677
      1.      678
      2.      679
      3.      680
      4.      681
      5.      682
      6.      683
      7.      684
      8.      685
      9.      686
      10.      687
      11.      688
      12.      689
  21.   690
    1.     691
    2.     692
    3.     693
      1.      694
  22.   695
    1.     696
    2.     697
    3.     698
    4.     699
      1.      700
      2.      701
      3.      702
      4.      703
        1.       704
        2.       705
          1.        706
          2.        707
      5.      708
      6.      709
      7.      710
    5.     711
    6.     712
    7.     713
      1.      714
  23.   715
    1.     716
    2.     717
    3.     718
    4.     719
      1.      720
      2.      721
        1.       722
        2.       723
      3.      724
      4.      725
        1.       726
        2.       727
          1.        728
          2.        729
        3.       730
        4.       731
        5.       732
        6.       733
        7.       734
    5.     735
    6.     736
    7.     737
      1.      738
  24.   739
    1.     740
    2.     741
    3.     742
      1.      743
        1.       744
        2.       745
        3.       746
        4.       747
        5.       748
      2.      749
        1.       750
      3.      751
        1.       752
        2.       753
      4.      754
      5.      755
        1.       756
        2.       757
    4.     758
    5.     759
      1.      760
  25.   761
    1.     762
    2.     763
    3.     764
    4.     765
      1.      766
        1.       767
      2.      768
      3.      769
      4.      770
        1.       771
      5.      772
        1.       773
      6.      774
        1.       775
      7.      776
        1.       777
      8.      778
        1.       779
        2.       780
    5.     781
      1.      782
      2.      783
      3.      784
      4.      785
        1.       786
        2.       787
        3.       788
    6.     789
      1.      790
      2.      791
      3.      792
      4.      793
    7.     794
    8.     795
      1.      796
      2.      797
    9.     798
      1.      799
  26.   800
    1.     801
      1.      802
    2.     803
      1.      804
      2.      805
      3.      806
        1.       807
        2.       808
        3.       809
      4.      810
        1.       811
        2.       812
        3.       813
    3.     814
      1.      815
      2.      816
        1.       817
        2.       818
        3.       819
        4.       820
        5.       821
          1.        822
          2.        823
          3.        824
        6.       825
          1.        826
        7.       827
          1.        828
          2.        829
          3.        830
          4.        831
        8.       832
      3.      833
        1.       834
          1.        835
          2.        836
          3.        837
          4.        838
          5.        839
          6.        840
          7.        841
          8.        842
          9.        843
          10.        844
          11.        845
          12.        846
          13.        847
          14.        848
        2.       849
          1.        850
          2.        851
          3.        852
          4.        853
          5.        854
          6.        855
          7.        856
          8.        857
          9.        858
          10.        859
          11.        860
          12.        861
          13.        862
          14.        863
          15.        864
          16.        865
          17.        866
          18.        867
          19.        868
          20.        869
      4.      870
        1.       871
        2.       872
        3.       873
        4.       874
        5.       875
    4.     876
      1.      877
        1.       878
        2.       879
        3.       880
        4.       881
        5.       882
      2.      883
        1.       884
        2.       885
    5.     886
      1.      887
        1.       888
        2.       889
        3.       890
        4.       891
      2.      892
      3.      893
        1.       894
        2.       895
      4.      896
        1.       897
          1.        898
            1.         899
            2.         900
          2.        901
          3.        902
          4.        903
          5.        904
        2.       905
        3.       906
        4.       907
        5.       908
        6.       909
      5.      910
        1.       911
        2.       912
        3.       913
        4.       914
        5.       915
        6.       916
    6.     917
      1.      918
        1.       919
          1.        920
        2.       921
        3.       922
        4.       923
      2.      924
    7.     925
      1.      926
      2.      927
    8.     928
      1.      929
      2.      930
      3.      931
      4.      932
      5.      933
      6.      934
      7.      935
      8.      936
        1.       937
        2.       938
        3.       939
        4.       940
      9.      941
        1.       942
        2.       943
        3.       944
      10.      945
        1.       946
        2.       947
        3.       948
        4.       949
        5.       950
      11.      951
        1.       952
        2.       953
        3.       954
        4.       955
        5.       956
      12.      957
      13.      958
      14.      959
      15.      960
      16.      961
      17.      962
    9.     963
      1.      964
    10.     965
      1.      966
      2.      967
        1.       968
          1.        969
        2.       970
        3.       971
      3.      972
      4.      973
        1.       974
        2.       975
      5.      976
        1.       977
        2.       978
          1.        979
        3.       980
          1.        981
          2.        982
        4.       983
          1.        984
          2.        985
        5.       986
          1.        987
          2.        988
          3.        989
      6.      990
        1.       991
        2.       992
    11.     993
      1.      994
      2.      995
      3.      996
  27.   997

20.8.11 AUX_MAC Registers

#AUX_MAC_AUX_MAC_MMAP_AUX_MAC_TABLE_1 lists the memory-mapped registers for the AUX_MAC registers. All register offset addresses not listed in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_TABLE_1 should be considered as reserved locations and the register contents should not be modified.

Table 20-228 AUX_MAC Registers
OffsetAcronymRegister NameSection
0hOP0SSigned Operand 0#AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_OP0S
4hOP0UUnsigned Operand 0#AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_OP0U
8hOP1SMULSigned Operand 1 and Multiply#AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_OP1SMUL
ChOP1UMULUnsigned Operand 1 and Multiply#AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_OP1UMUL
10hOP1SMACSigned Operand 1 and Multiply-Accumulate#AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_OP1SMAC
14hOP1UMACUnsigned Operand 1 and Multiply-Accumulate#AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_OP1UMAC
18hOP1SADD16Signed Operand 1 and 16-bit Addition#AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_OP1SADD16
1ChOP1UADD16Unsigned Operand 1 and 16-bit Addition#AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_OP1UADD16
20hOP1SADD32Signed Operand 1 and 32-bit Addition#AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_OP1SADD32
24hOP1UADD32Unsigned Operand 1 and 32-bit Addition#AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_OP1UADD32
28hCLZCount Leading Zero#AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_CLZ
2ChCLSCount Leading Sign#AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_CLS
30hACCSHIFTAccumulator Shift#AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACCSHIFT
34hACCRESETAccumulator Reset#AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACCRESET
38hACC15_0Accumulator Bits 15:0#AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC15_0
3ChACC16_1Accumulator Bits 16:1#AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC16_1
40hACC17_2Accumulator Bits 17:2#AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC17_2
44hACC18_3Accumulator Bits 18:3#AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC18_3
48hACC19_4Accumulator Bits 19:4#AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC19_4
4ChACC20_5Accumulator Bits 20:5#AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC20_5
50hACC21_6Accumulator Bits 21:6#AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC21_6
54hACC22_7Accumulator Bits 22:7#AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC22_7
58hACC23_8Accumulator Bits 23:8#AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC23_8
5ChACC24_9Accumulator Bits 24:9#AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC24_9
60hACC25_10Accumulator Bits 25:10#AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC25_10
64hACC26_11Accumulator Bits 26:11#AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC26_11
68hACC27_12Accumulator Bits 27:12#AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC27_12
6ChACC28_13Accumulator Bits 28:13#AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC28_13
70hACC29_14Accumulator Bits 29:14#AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC29_14
74hACC30_15Accumulator Bits 30:15#AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC30_15
78hACC31_16Accumulator Bits 31:16#AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC31_16
7ChACC32_17Accumulator Bits 32:17#AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC32_17
80hACC33_18Accumulator Bits 33:18#AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC33_18
84hACC34_19Accumulator Bits 34:19#AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC34_19
88hACC35_20Accumulator Bits 35:20#AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC35_20
8ChACC36_21Accumulator Bits 36:21#AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC36_21
90hACC37_22Accumulator Bits 37:22#AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC37_22
94hACC38_23Accumulator Bits 38:23#AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC38_23
98hACC39_24Accumulator Bits 39:24#AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC39_24
9ChACC39_32Accumulator Bits 39:32#AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC39_32

Complex bit access types are encoded to fit into small table cells. #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_LEGEND shows the codes that are used for access types in this section.

Table 20-229 AUX_MAC Access Type Codes
Access TypeCodeDescription
Read Type
RRRead
Write Type
WWWrite
Reset or Default Value
-nValue after reset or the default value

20.8.11.1 OP0S Register (Offset = 0h) [Reset = 00000000h]

OP0S is shown in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_OP0S_FIGURE and described in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_OP0S_TABLE.

Return to the Summary Table.

Signed Operand 0

Figure 20-204 OP0S Register
313029282726252423222120191817161514131211109876543210
RESERVEDOP0_VALUE
R-0hW-0h
Table 20-230 OP0S Register Field Descriptions
BitFieldTypeResetDescription
31-16RESERVEDR0hReserved
15-0OP0_VALUEW0hSigned operand 0.
Operand for multiply, multiply-and-accumulate, or 32-bit add operations.

20.8.11.2 OP0U Register (Offset = 4h) [Reset = 00000000h]

OP0U is shown in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_OP0U_FIGURE and described in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_OP0U_TABLE.

Return to the Summary Table.

Unsigned Operand 0

Figure 20-205 OP0U Register
313029282726252423222120191817161514131211109876543210
RESERVEDOP0_VALUE
R-0hW-0h
Table 20-231 OP0U Register Field Descriptions
BitFieldTypeResetDescription
31-16RESERVEDR0hReserved
15-0OP0_VALUEW0hUnsigned operand 0.
Operand for multiply, multiply-and-accumulate, or 32-bit add operations.

20.8.11.3 OP1SMUL Register (Offset = 8h) [Reset = 00000000h]

OP1SMUL is shown in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_OP1SMUL_FIGURE and described in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_OP1SMUL_TABLE.

Return to the Summary Table.

Signed Operand 1 and Multiply

Figure 20-206 OP1SMUL Register
313029282726252423222120191817161514131211109876543210
RESERVEDOP1_VALUE
R-0hW-0h
Table 20-232 OP1SMUL Register Field Descriptions
BitFieldTypeResetDescription
31-16RESERVEDR0hReserved
15-0OP1_VALUEW0hSigned operand 1 and multiplication trigger.
Write OP1_VALUE to set signed operand 1 and trigger the following operation:
When operand 0 was written to OP0S.OP0_VALUE: ACC = OP1_VALUE * OP0S.OP0_VALUE.
When operand 0 was written to OP0U.OP0_VALUE: ACC = OP1_VALUE * OP0U.OP0_VALUE.

20.8.11.4 OP1UMUL Register (Offset = Ch) [Reset = 00000000h]

OP1UMUL is shown in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_OP1UMUL_FIGURE and described in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_OP1UMUL_TABLE.

Return to the Summary Table.

Unsigned Operand 1 and Multiply

Figure 20-207 OP1UMUL Register
313029282726252423222120191817161514131211109876543210
RESERVEDOP1_VALUE
R-0hW-0h
Table 20-233 OP1UMUL Register Field Descriptions
BitFieldTypeResetDescription
31-16RESERVEDR0hReserved
15-0OP1_VALUEW0hUnsigned operand 1 and multiplication trigger.
Write OP1_VALUE to set unsigned operand 1 and trigger the following operation:
When operand 0 was written to OP0S.OP0_VALUE: ACC = OP1_VALUE * OP0S.OP0_VALUE.
When operand 0 was written to OP0U.OP0_VALUE: ACC = OP1_VALUE * OP0U.OP0_VALUE.

20.8.11.5 OP1SMAC Register (Offset = 10h) [Reset = 00000000h]

OP1SMAC is shown in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_OP1SMAC_FIGURE and described in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_OP1SMAC_TABLE.

Return to the Summary Table.

Signed Operand 1 and Multiply-Accumulate

Figure 20-208 OP1SMAC Register
313029282726252423222120191817161514131211109876543210
RESERVEDOP1_VALUE
R-0hW-0h
Table 20-234 OP1SMAC Register Field Descriptions
BitFieldTypeResetDescription
31-16RESERVEDR0hReserved
15-0OP1_VALUEW0hSigned operand 1 and multiply-accumulation trigger.
Write OP1_VALUE to set signed operand 1 and trigger the following operation:
When operand 0 was written to OP0S.OP0_VALUE: ACC = ACC + ( OP1_VALUE * OP0S.OP0_VALUE ).
When operand 0 was written to OP0U.OP0_VALUE: ACC = ACC + ( OP1_VALUE * OP0U.OP0_VALUE ).

20.8.11.6 OP1UMAC Register (Offset = 14h) [Reset = 00000000h]

OP1UMAC is shown in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_OP1UMAC_FIGURE and described in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_OP1UMAC_TABLE.

Return to the Summary Table.

Unsigned Operand 1 and Multiply-Accumulate

Figure 20-209 OP1UMAC Register
313029282726252423222120191817161514131211109876543210
RESERVEDOP1_VALUE
R-0hW-0h
Table 20-235 OP1UMAC Register Field Descriptions
BitFieldTypeResetDescription
31-16RESERVEDR0hReserved
15-0OP1_VALUEW0hUnsigned operand 1 and multiply-accumulation trigger.
Write OP1_VALUE to set unsigned operand 1 and trigger the following operation:
When operand 0 was written to OP0S.OP0_VALUE: ACC = ACC + ( OP1_VALUE * OP0S.OP0_VALUE ).
When operand 0 was written to OP0U.OP0_VALUE: ACC = ACC + ( OP1_VALUE * OP0U.OP0_VALUE ).

20.8.11.7 OP1SADD16 Register (Offset = 18h) [Reset = 00000000h]

OP1SADD16 is shown in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_OP1SADD16_FIGURE and described in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_OP1SADD16_TABLE.

Return to the Summary Table.

Signed Operand 1 and 16-bit Addition

Figure 20-210 OP1SADD16 Register
313029282726252423222120191817161514131211109876543210
RESERVEDOP1_VALUE
R-0hW-0h
Table 20-236 OP1SADD16 Register Field Descriptions
BitFieldTypeResetDescription
31-16RESERVEDR0hReserved
15-0OP1_VALUEW0hSigned operand 1 and 16-bit addition trigger.
Write OP1_VALUE to set signed operand 1 and trigger the following operation:
ACC = ACC + OP1_VALUE.

20.8.11.8 OP1UADD16 Register (Offset = 1Ch) [Reset = 00000000h]

OP1UADD16 is shown in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_OP1UADD16_FIGURE and described in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_OP1UADD16_TABLE.

Return to the Summary Table.

Unsigned Operand 1 and 16-bit Addition

Figure 20-211 OP1UADD16 Register
313029282726252423222120191817161514131211109876543210
RESERVEDOP1_VALUE
R-0hW-0h
Table 20-237 OP1UADD16 Register Field Descriptions
BitFieldTypeResetDescription
31-16RESERVEDR0hReserved
15-0OP1_VALUEW0hUnsigned operand 1 and 16-bit addition trigger.
Write OP1_VALUE to set unsigned operand 1 and trigger the following operation:
ACC = ACC + OP1_VALUE.

20.8.11.9 OP1SADD32 Register (Offset = 20h) [Reset = 00000000h]

OP1SADD32 is shown in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_OP1SADD32_FIGURE and described in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_OP1SADD32_TABLE.

Return to the Summary Table.

Signed Operand 1 and 32-bit Addition

Figure 20-212 OP1SADD32 Register
313029282726252423222120191817161514131211109876543210
RESERVEDOP1_VALUE
R-0hW-0h
Table 20-238 OP1SADD32 Register Field Descriptions
BitFieldTypeResetDescription
31-16RESERVEDR0hReserved
15-0OP1_VALUEW0hUpper half of signed 32-bit operand and addition trigger.
Write OP1_VALUE to set upper half of signed 32-bit operand and trigger the following operation:
When lower half of 32-bit operand was written to OP0S.OP0_VALUE: ACC = ACC + (( OP1_VALUE << 16) | OP0S.OP0_VALUE ).
When lower half of 32-bit operand was written to OP0U.OP0_VALUE: ACC = ACC + (( OP1_VALUE << 16) | OP0U.OP0_VALUE ).

20.8.11.10 OP1UADD32 Register (Offset = 24h) [Reset = 00000000h]

OP1UADD32 is shown in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_OP1UADD32_FIGURE and described in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_OP1UADD32_TABLE.

Return to the Summary Table.

Unsigned Operand 1 and 32-bit Addition

Figure 20-213 OP1UADD32 Register
313029282726252423222120191817161514131211109876543210
RESERVEDOP1_VALUE
R-0hW-0h
Table 20-239 OP1UADD32 Register Field Descriptions
BitFieldTypeResetDescription
31-16RESERVEDR0hReserved
15-0OP1_VALUEW0hUpper half of unsigned 32-bit operand and addition trigger.
Write OP1_VALUE to set upper half of unsigned 32-bit operand and trigger the following operation:
When lower half of 32-bit operand was written to OP0S.OP0_VALUE: ACC = ACC + (( OP1_VALUE << 16) | OP0S.OP0_VALUE ).
When lower half of 32-bit operand was written to OP0U.OP0_VALUE: ACC = ACC + (( OP1_VALUE << 16) | OP0U.OP0_VALUE ).

20.8.11.11 CLZ Register (Offset = 28h) [Reset = 00000028h]

CLZ is shown in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_CLZ_FIGURE and described in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_CLZ_TABLE.

Return to the Summary Table.

Count Leading Zero

Figure 20-214 CLZ Register
313029282726252423222120191817161514131211109876543210
RESERVEDVALUE
R-0hR-28h
Table 20-240 CLZ Register Field Descriptions
BitFieldTypeResetDescription
31-6RESERVEDR0hReserved
5-0VALUER28hNumber of leading zero bits in the accumulator:
0x00: 0 leading zeros.
0x01: 1 leading zero.
...
0x28: 40 leading zeros (accumulator value is 0).

20.8.11.12 CLS Register (Offset = 2Ch) [Reset = 00000028h]

CLS is shown in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_CLS_FIGURE and described in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_CLS_TABLE.

Return to the Summary Table.

Count Leading Sign

Figure 20-215 CLS Register
313029282726252423222120191817161514131211109876543210
RESERVEDVALUE
R-0hR-28h
Table 20-241 CLS Register Field Descriptions
BitFieldTypeResetDescription
31-6RESERVEDR0hReserved
5-0VALUER28hNumber of leading sign bits in the accumulator.
When MSB of accumulator is 0, VALUE is number of leading zeros, MSB included.
When MSB of accumulator is 1, VALUE is number of leading ones, MSB included.
VALUE range is 1 thru 40.

20.8.11.13 ACCSHIFT Register (Offset = 30h) [Reset = 00000000h]

ACCSHIFT is shown in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACCSHIFT_FIGURE and described in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACCSHIFT_TABLE.

Return to the Summary Table.

Accumulator Shift
Only one shift operation can be triggered per register write.

Figure 20-216 ACCSHIFT Register
3130292827262524
RESERVED
R-0h
2322212019181716
RESERVED
R-0h
15141312111098
RESERVED
R-0h
76543210
RESERVEDLSL1LSR1ASR1
R-0hW-0hW-0hW-0h
Table 20-242 ACCSHIFT Register Field Descriptions
BitFieldTypeResetDescription
31-3RESERVEDR0hReserved
2LSL1W0hLogic shift left by 1 bit.
Write 1 to shift the accumulator one bit to the left, 0 inserted at bit 0.
1LSR1W0hLogic shift right by 1 bit.
Write 1 to shift the accumulator one bit to the right, 0 inserted at bit 39.
0ASR1W0hArithmetic shift right by 1 bit.
Write 1 to shift the accumulator one bit to the right, previous sign bit inserted at bit 39.

20.8.11.14 ACCRESET Register (Offset = 34h) [Reset = 00000000h]

ACCRESET is shown in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACCRESET_FIGURE and described in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACCRESET_TABLE.

Return to the Summary Table.

Accumulator Reset

Figure 20-217 ACCRESET Register
313029282726252423222120191817161514131211109876543210
RESERVEDTRG
R-0hW-0h
Table 20-243 ACCRESET Register Field Descriptions
BitFieldTypeResetDescription
31-16RESERVEDR0hReserved
15-0TRGW0hWrite any value to this register to trigger a reset of all bits in the accumulator.

20.8.11.15 ACC15_0 Register (Offset = 38h) [Reset = 00000000h]

ACC15_0 is shown in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC15_0_FIGURE and described in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC15_0_TABLE.

Return to the Summary Table.

Accumulator Bits 15:0

Figure 20-218 ACC15_0 Register
313029282726252423222120191817161514131211109876543210
RESERVEDVALUE
R-0hR/W-0h
Table 20-244 ACC15_0 Register Field Descriptions
BitFieldTypeResetDescription
31-16RESERVEDR0hReserved
15-0VALUER/W0hValue of the accumulator, bits 15:0.
Write VALUE to initialize bits 15:0 of accumulator.

20.8.11.16 ACC16_1 Register (Offset = 3Ch) [Reset = 00000000h]

ACC16_1 is shown in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC16_1_FIGURE and described in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC16_1_TABLE.

Return to the Summary Table.

Accumulator Bits 16:1

Figure 20-219 ACC16_1 Register
313029282726252423222120191817161514131211109876543210
RESERVEDVALUE
R-0hR-0h
Table 20-245 ACC16_1 Register Field Descriptions
BitFieldTypeResetDescription
31-16RESERVEDR0hReserved
15-0VALUER0hValue of the accumulator, bits 16:1.

20.8.11.17 ACC17_2 Register (Offset = 40h) [Reset = 00000000h]

ACC17_2 is shown in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC17_2_FIGURE and described in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC17_2_TABLE.

Return to the Summary Table.

Accumulator Bits 17:2

Figure 20-220 ACC17_2 Register
313029282726252423222120191817161514131211109876543210
RESERVEDVALUE
R-0hR-0h
Table 20-246 ACC17_2 Register Field Descriptions
BitFieldTypeResetDescription
31-16RESERVEDR0hReserved
15-0VALUER0hValue of the accumulator, bits 17:2.

20.8.11.18 ACC18_3 Register (Offset = 44h) [Reset = 00000000h]

ACC18_3 is shown in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC18_3_FIGURE and described in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC18_3_TABLE.

Return to the Summary Table.

Accumulator Bits 18:3

Figure 20-221 ACC18_3 Register
313029282726252423222120191817161514131211109876543210
RESERVEDVALUE
R-0hR-0h
Table 20-247 ACC18_3 Register Field Descriptions
BitFieldTypeResetDescription
31-16RESERVEDR0hReserved
15-0VALUER0hValue of the accumulator, bits 18:3.

20.8.11.19 ACC19_4 Register (Offset = 48h) [Reset = 00000000h]

ACC19_4 is shown in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC19_4_FIGURE and described in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC19_4_TABLE.

Return to the Summary Table.

Accumulator Bits 19:4

Figure 20-222 ACC19_4 Register
313029282726252423222120191817161514131211109876543210
RESERVEDVALUE
R-0hR-0h
Table 20-248 ACC19_4 Register Field Descriptions
BitFieldTypeResetDescription
31-16RESERVEDR0hReserved
15-0VALUER0hValue of the accumulator, bits 19:4.

20.8.11.20 ACC20_5 Register (Offset = 4Ch) [Reset = 00000000h]

ACC20_5 is shown in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC20_5_FIGURE and described in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC20_5_TABLE.

Return to the Summary Table.

Accumulator Bits 20:5

Figure 20-223 ACC20_5 Register
313029282726252423222120191817161514131211109876543210
RESERVEDVALUE
R-0hR-0h
Table 20-249 ACC20_5 Register Field Descriptions
BitFieldTypeResetDescription
31-16RESERVEDR0hReserved
15-0VALUER0hValue of the accumulator, bits 20:5.

20.8.11.21 ACC21_6 Register (Offset = 50h) [Reset = 00000000h]

ACC21_6 is shown in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC21_6_FIGURE and described in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC21_6_TABLE.

Return to the Summary Table.

Accumulator Bits 21:6

Figure 20-224 ACC21_6 Register
313029282726252423222120191817161514131211109876543210
RESERVEDVALUE
R-0hR-0h
Table 20-250 ACC21_6 Register Field Descriptions
BitFieldTypeResetDescription
31-16RESERVEDR0hReserved
15-0VALUER0hValue of the accumulator, bits 21:6.

20.8.11.22 ACC22_7 Register (Offset = 54h) [Reset = 00000000h]

ACC22_7 is shown in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC22_7_FIGURE and described in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC22_7_TABLE.

Return to the Summary Table.

Accumulator Bits 22:7

Figure 20-225 ACC22_7 Register
313029282726252423222120191817161514131211109876543210
RESERVEDVALUE
R-0hR-0h
Table 20-251 ACC22_7 Register Field Descriptions
BitFieldTypeResetDescription
31-16RESERVEDR0hReserved
15-0VALUER0hValue of the accumulator, bits 22:7.

20.8.11.23 ACC23_8 Register (Offset = 58h) [Reset = 00000000h]

ACC23_8 is shown in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC23_8_FIGURE and described in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC23_8_TABLE.

Return to the Summary Table.

Accumulator Bits 23:8

Figure 20-226 ACC23_8 Register
313029282726252423222120191817161514131211109876543210
RESERVEDVALUE
R-0hR-0h
Table 20-252 ACC23_8 Register Field Descriptions
BitFieldTypeResetDescription
31-16RESERVEDR0hReserved
15-0VALUER0hValue of the accumulator, bits 23:8.

20.8.11.24 ACC24_9 Register (Offset = 5Ch) [Reset = 00000000h]

ACC24_9 is shown in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC24_9_FIGURE and described in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC24_9_TABLE.

Return to the Summary Table.

Accumulator Bits 24:9

Figure 20-227 ACC24_9 Register
313029282726252423222120191817161514131211109876543210
RESERVEDVALUE
R-0hR-0h
Table 20-253 ACC24_9 Register Field Descriptions
BitFieldTypeResetDescription
31-16RESERVEDR0hReserved
15-0VALUER0hValue of the accumulator, bits 24:9.

20.8.11.25 ACC25_10 Register (Offset = 60h) [Reset = 00000000h]

ACC25_10 is shown in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC25_10_FIGURE and described in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC25_10_TABLE.

Return to the Summary Table.

Accumulator Bits 25:10

Figure 20-228 ACC25_10 Register
313029282726252423222120191817161514131211109876543210
RESERVEDVALUE
R-0hR-0h
Table 20-254 ACC25_10 Register Field Descriptions
BitFieldTypeResetDescription
31-16RESERVEDR0hReserved
15-0VALUER0hValue of the accumulator, bits 25:10.

20.8.11.26 ACC26_11 Register (Offset = 64h) [Reset = 00000000h]

ACC26_11 is shown in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC26_11_FIGURE and described in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC26_11_TABLE.

Return to the Summary Table.

Accumulator Bits 26:11

Figure 20-229 ACC26_11 Register
313029282726252423222120191817161514131211109876543210
RESERVEDVALUE
R-0hR-0h
Table 20-255 ACC26_11 Register Field Descriptions
BitFieldTypeResetDescription
31-16RESERVEDR0hReserved
15-0VALUER0hValue of the accumulator, bits 26:11.

20.8.11.27 ACC27_12 Register (Offset = 68h) [Reset = 00000000h]

ACC27_12 is shown in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC27_12_FIGURE and described in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC27_12_TABLE.

Return to the Summary Table.

Accumulator Bits 27:12

Figure 20-230 ACC27_12 Register
313029282726252423222120191817161514131211109876543210
RESERVEDVALUE
R-0hR-0h
Table 20-256 ACC27_12 Register Field Descriptions
BitFieldTypeResetDescription
31-16RESERVEDR0hReserved
15-0VALUER0hValue of the accumulator, bits 27:12.

20.8.11.28 ACC28_13 Register (Offset = 6Ch) [Reset = 00000000h]

ACC28_13 is shown in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC28_13_FIGURE and described in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC28_13_TABLE.

Return to the Summary Table.

Accumulator Bits 28:13

Figure 20-231 ACC28_13 Register
313029282726252423222120191817161514131211109876543210
RESERVEDVALUE
R-0hR-0h
Table 20-257 ACC28_13 Register Field Descriptions
BitFieldTypeResetDescription
31-16RESERVEDR0hReserved
15-0VALUER0hValue of the accumulator, bits 28:13.

20.8.11.29 ACC29_14 Register (Offset = 70h) [Reset = 00000000h]

ACC29_14 is shown in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC29_14_FIGURE and described in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC29_14_TABLE.

Return to the Summary Table.

Accumulator Bits 29:14

Figure 20-232 ACC29_14 Register
313029282726252423222120191817161514131211109876543210
RESERVEDVALUE
R-0hR-0h
Table 20-258 ACC29_14 Register Field Descriptions
BitFieldTypeResetDescription
31-16RESERVEDR0hReserved
15-0VALUER0hValue of the accumulator, bits 29:14.

20.8.11.30 ACC30_15 Register (Offset = 74h) [Reset = 00000000h]

ACC30_15 is shown in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC30_15_FIGURE and described in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC30_15_TABLE.

Return to the Summary Table.

Accumulator Bits 30:15

Figure 20-233 ACC30_15 Register
313029282726252423222120191817161514131211109876543210
RESERVEDVALUE
R-0hR-0h
Table 20-259 ACC30_15 Register Field Descriptions
BitFieldTypeResetDescription
31-16RESERVEDR0hReserved
15-0VALUER0hValue of the accumulator, bits 30:15.

20.8.11.31 ACC31_16 Register (Offset = 78h) [Reset = 00000000h]

ACC31_16 is shown in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC31_16_FIGURE and described in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC31_16_TABLE.

Return to the Summary Table.

Accumulator Bits 31:16

Figure 20-234 ACC31_16 Register
313029282726252423222120191817161514131211109876543210
RESERVEDVALUE
R-0hR/W-0h
Table 20-260 ACC31_16 Register Field Descriptions
BitFieldTypeResetDescription
31-16RESERVEDR0hReserved
15-0VALUER/W0hValue of the accumulator, bits 31:16.
Write VALUE to initialize bits 31:16 of accumulator.

20.8.11.32 ACC32_17 Register (Offset = 7Ch) [Reset = 00000000h]

ACC32_17 is shown in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC32_17_FIGURE and described in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC32_17_TABLE.

Return to the Summary Table.

Accumulator Bits 32:17

Figure 20-235 ACC32_17 Register
313029282726252423222120191817161514131211109876543210
RESERVEDVALUE
R-0hR-0h
Table 20-261 ACC32_17 Register Field Descriptions
BitFieldTypeResetDescription
31-16RESERVEDR0hReserved
15-0VALUER0hValue of the accumulator, bits 32:17.

20.8.11.33 ACC33_18 Register (Offset = 80h) [Reset = 00000000h]

ACC33_18 is shown in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC33_18_FIGURE and described in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC33_18_TABLE.

Return to the Summary Table.

Accumulator Bits 33:18

Figure 20-236 ACC33_18 Register
313029282726252423222120191817161514131211109876543210
RESERVEDVALUE
R-0hR-0h
Table 20-262 ACC33_18 Register Field Descriptions
BitFieldTypeResetDescription
31-16RESERVEDR0hReserved
15-0VALUER0hValue of the accumulator, bits 33:18.

20.8.11.34 ACC34_19 Register (Offset = 84h) [Reset = 00000000h]

ACC34_19 is shown in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC34_19_FIGURE and described in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC34_19_TABLE.

Return to the Summary Table.

Accumulator Bits 34:19

Figure 20-237 ACC34_19 Register
313029282726252423222120191817161514131211109876543210
RESERVEDVALUE
R-0hR-0h
Table 20-263 ACC34_19 Register Field Descriptions
BitFieldTypeResetDescription
31-16RESERVEDR0hReserved
15-0VALUER0hValue of the accumulator, bits 34:19.

20.8.11.35 ACC35_20 Register (Offset = 88h) [Reset = 00000000h]

ACC35_20 is shown in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC35_20_FIGURE and described in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC35_20_TABLE.

Return to the Summary Table.

Accumulator Bits 35:20

Figure 20-238 ACC35_20 Register
313029282726252423222120191817161514131211109876543210
RESERVEDVALUE
R-0hR-0h
Table 20-264 ACC35_20 Register Field Descriptions
BitFieldTypeResetDescription
31-16RESERVEDR0hReserved
15-0VALUER0hValue of the accumulator, bits 35:20.

20.8.11.36 ACC36_21 Register (Offset = 8Ch) [Reset = 00000000h]

ACC36_21 is shown in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC36_21_FIGURE and described in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC36_21_TABLE.

Return to the Summary Table.

Accumulator Bits 36:21

Figure 20-239 ACC36_21 Register
313029282726252423222120191817161514131211109876543210
RESERVEDVALUE
R-0hR-0h
Table 20-265 ACC36_21 Register Field Descriptions
BitFieldTypeResetDescription
31-16RESERVEDR0hReserved
15-0VALUER0hValue of the accumulator, bits 36:21.

20.8.11.37 ACC37_22 Register (Offset = 90h) [Reset = 00000000h]

ACC37_22 is shown in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC37_22_FIGURE and described in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC37_22_TABLE.

Return to the Summary Table.

Accumulator Bits 37:22

Figure 20-240 ACC37_22 Register
313029282726252423222120191817161514131211109876543210
RESERVEDVALUE
R-0hR-0h
Table 20-266 ACC37_22 Register Field Descriptions
BitFieldTypeResetDescription
31-16RESERVEDR0hReserved
15-0VALUER0hValue of the accumulator, bits 37:22.

20.8.11.38 ACC38_23 Register (Offset = 94h) [Reset = 00000000h]

ACC38_23 is shown in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC38_23_FIGURE and described in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC38_23_TABLE.

Return to the Summary Table.

Accumulator Bits 38:23

Figure 20-241 ACC38_23 Register
313029282726252423222120191817161514131211109876543210
RESERVEDVALUE
R-0hR-0h
Table 20-267 ACC38_23 Register Field Descriptions
BitFieldTypeResetDescription
31-16RESERVEDR0hReserved
15-0VALUER0hValue of the accumulator, bits 38:23.

20.8.11.39 ACC39_24 Register (Offset = 98h) [Reset = 00000000h]

ACC39_24 is shown in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC39_24_FIGURE and described in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC39_24_TABLE.

Return to the Summary Table.

Accumulator Bits 39:24

Figure 20-242 ACC39_24 Register
313029282726252423222120191817161514131211109876543210
RESERVEDVALUE
R-0hR-0h
Table 20-268 ACC39_24 Register Field Descriptions
BitFieldTypeResetDescription
31-16RESERVEDR0hReserved
15-0VALUER0hValue of the accumulator, bits 39:24.

20.8.11.40 ACC39_32 Register (Offset = 9Ch) [Reset = 00000000h]

ACC39_32 is shown in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC39_32_FIGURE and described in #AUX_MAC_AUX_MAC_MMAP_AUX_MAC_AUX_MAC_ALL_ACC39_32_TABLE.

Return to the Summary Table.

Accumulator Bits 39:32

Figure 20-243 ACC39_32 Register
313029282726252423222120191817161514131211109876543210
RESERVEDVALUE
R-0hR/W-0h
Table 20-269 ACC39_32 Register Field Descriptions
BitFieldTypeResetDescription
31-8RESERVEDR0hReserved
7-0VALUER/W0hValue of the accumulator, bits 39:32.
Write VALUE to initialize bits 39:32 of accumulator.