产品详细信息

Arm CPU 1 Arm Cortex-A8 Arm MHz (Max.) 600 Co-processor(s) GPU CPU 32-bit Graphics acceleration 1 3D Display type 1 LCD Protocols Ethernet Ethernet MAC 10/100 Hardware accelerators Image/Video Extension, SGX Graphics Operating system Linux, RTOS Security Crypto Rating Catalog Operating temperature range (C) -40 to 105, 0 to 90
Arm CPU 1 Arm Cortex-A8 Arm MHz (Max.) 600 Co-processor(s) GPU CPU 32-bit Graphics acceleration 1 3D Display type 1 LCD Protocols Ethernet Ethernet MAC 10/100 Hardware accelerators Image/Video Extension, SGX Graphics Operating system Linux, RTOS Security Crypto Rating Catalog Operating temperature range (C) -40 to 105, 0 to 90
BGA (ZER) 484 529 mm² 23 x 23 NFBGA (ZCN) 491 289 mm² 17 x 17
  • AM3517/05 Sitara Processor:
    • MPU Subsystem
      • 600-MHz Sitara ARM Cortex-A8 Core
      • NEON SIMD Coprocessor and Vector
        Floating-Point (FP) Coprocessor
    • Memory Interfaces:
      • 166-MHz 16- and 32-Bit mDDR/DDR2
        Interface with 1GB of Total Addressable
        Space
      • Up to 83 MHz General-Purpose Memory
        Interface Supporting 16-Bit-Wide
        Multiplexed Address/DataBus
      • 64KB of SRAM
      • 3 Removable Media Interfaces
        [MMC/SD/SDIO]
    • IO Voltage:
      • mDDR/DDR2 IOs: 1.8V
      • Other IOs: 1.8V and 3.3V
    • Core Voltage: 1.2V
    • Commercial and Extended Temperature Grade
      (operating restrictions apply)
    • 16-Bit Video Input Port Capable of
      Capturing HD Video
    • HD Resolution Display Subsystem
    • Serial Communication
      • High-End CAN Controller
      • 10/100 Mbit Ethernet MAC
      • USB OTG Subsystem with Standard
        DP/DM Interface [HS/FS/LS]
      • Multiport USB Host Subsystem [HS/FS/LS]
        • 12-Pin ULPI or 6-, 4-, or 3-Pin Serial
          Interface
      • Four Master and Slave Multichannel Serial
        Port Interface(McSPI) Ports
      • Five Multichannel Buffered Serial Ports (McBSPs)
        • 512-Byte Transmit and Receive Buffer
          (McBSP1/3/4/5)
        • 5-KB Transmit and Receive Buffer (McBSP2)
        • SIDETONE Core Support (McBSP2 and
          McBSP3 Only)For Filter, Gain, and Mix
          Operations
        • 128-Channel Transmit and Receive Mode
        • Direct Interface to I2S and PCM Device and
          TDM Buses
      • HDQ/1-Wire Interface
      • 4 UARTs (One with Infrared Data Association
        [IrDA] and Consumer Infrared [CIR] Modes)
      • 3 Master and Slave High-Speed Inter-Integrated
        Circuit (I2C) Controllers
      • Twelve 32-bit General-Purpose Timers
      • One 32-bit Watchdog Timer
      • One 32-bit 32-kHz Sync Timer
      • Up to 186 General-Purpose I/O (GPIO) Pins
  • Display Subsystem
    • Parallel Digital Output
    • Up to 24-Bit RGB
    • Supports Up to 2 LCD Panels
    • Support for Remote Frame Buffer Interface (RFBI)
      LCD Panels
    • Two 10-Bit Digital-to-Analog Converters (DACs)
      Supporting
      • Composite NTSC/PAL Video
      • Luma/Chroma Separate Video (S-Video)
    • Rotation of 90, 180, and 270 Degrees
    • Resize Images From 1/4x to 8x
    • Color Space Converter
    • 8-Bit Alpha Blending
  • Video Processing Front End (VPFE) 16-Bit Video Input Port
    • RAW Data Interface
    • 75-MHz Maximum Pixel Clock
    • Supports REC656/CCIR656 Standard
    • Supports YCbCr422 Format (8-Bit or 16-Bit with Discrete
      Horizontal and Vertical Sync Signals)
    • Generates Optical Black Clamping Signals
    • Built-in Digital Clamping and Black Level Compensation
    • 10-Bit to 8-Bit A-law Compression Hardware
    • Supports up to 16K Pixels (Image Size) in Horizontal
      and Vertical Directions
  • System Direct Memory Access (sDMA) Controller (32 Logical
    Channels with Configurable Priority)
  • Comprehensive Power, Reset, and Clock Management
  • ARM Cortex-A8 Memory Architecture
    • ARMv7 Architecture
      • In-Order, Dual-Issue, Superscalar Microprocessor Core
      • ARM NEON Multimedia Architecture
      • Over 2x Performance of ARMv6 SIMD
      • Supports Both Integer and Floating-Point SIMD
      • Jazelle RCT Execution Environment Architecture
      • Dynamic Branch Prediction with Branch Target Address
        Cache, Global History Buffer and 8-Entry Return Stack
      • Embedded Trace Macrocell [ETM] Support for
        Noninvasive Debug
      • 16KB of Instruction Cache (4-Way Set-Associative)
      • 16KB of Data Cache (4-Way Set-Associative)
      • 256KB of L2 Cache
    • PowerVR SGX Graphics Accelerator (AM3517 Only)
      • Tile-Based Architecture Delivering up to 10 MPoly/sec
      • Universal Scalable Shader Engine: Multi-threaded Engine
        Incorporating Pixel and Vertex Shader Functionality
      • Industry Standard API Support: OpenGLES 1.1 and
        2.0, OpenVG1.0
      • Fine-Grained Task Switching, Load Balancing, and
        Power Management
      • Programmable, High-Quality Image Anti-Aliasing
    • Endianess
      • ARM Instructions – Little Endian
      • ARM Data – Configurable
    • SDRC Memory Controller
      • 16- and 32-Bit Memory Controller with 1GB of
        Total Address Space
      • Double Data Rate (DDR2) SDRAM, Mobile Double Data Rate
        (mDDR)SDRAM
      • SDRAM Memory Scheduler (SMS) and Rotation Engine
    • General Purpose Memory Controller (GPMC)
      • 16-Bit-Wide Multiplexed Address/Data Bus
      • Up to 8 Chip-Select Pins with 128MB of Address
        Space per Chip-Select Pin
      • Glueless Interface to NOR Flash, NAND Flash (with ECC
        Hamming Code Calculation), SRAM and Pseudo-SRAM
      • Flexible Asynchronous Protocol Control for Interface
        to Custom Logic (FPGA, CPLD, ASICs, and so forth)
      • Nonmultiplexed Address/Data Mode (Limited 2-KB
        Address Space)
    • Test Interfaces
      • IEEE-1149.1 (JTAG) Boundary-Scan Compatible
      • Embedded Trace Macro Interface (ETM)
    • 65-nm CMOS Technology
    • Packages:
      • 491-Pin BGA (17 x 17, 0.65-mm Pitch)
        [ZCN Suffix]
        with Via Channel Array
        Technology
      • 484-Pin PBGA (23 x 23, 1-mm Pitch)
        [ZER Suffix]
    • AM3517/05 Sitara Processor:
      • MPU Subsystem
        • 600-MHz Sitara ARM Cortex-A8 Core
        • NEON SIMD Coprocessor and Vector
          Floating-Point (FP) Coprocessor
      • Memory Interfaces:
        • 166-MHz 16- and 32-Bit mDDR/DDR2
          Interface with 1GB of Total Addressable
          Space
        • Up to 83 MHz General-Purpose Memory
          Interface Supporting 16-Bit-Wide
          Multiplexed Address/DataBus
        • 64KB of SRAM
        • 3 Removable Media Interfaces
          [MMC/SD/SDIO]
      • IO Voltage:
        • mDDR/DDR2 IOs: 1.8V
        • Other IOs: 1.8V and 3.3V
      • Core Voltage: 1.2V
      • Commercial and Extended Temperature Grade
        (operating restrictions apply)
      • 16-Bit Video Input Port Capable of
        Capturing HD Video
      • HD Resolution Display Subsystem
      • Serial Communication
        • High-End CAN Controller
        • 10/100 Mbit Ethernet MAC
        • USB OTG Subsystem with Standard
          DP/DM Interface [HS/FS/LS]
        • Multiport USB Host Subsystem [HS/FS/LS]
          • 12-Pin ULPI or 6-, 4-, or 3-Pin Serial
            Interface
        • Four Master and Slave Multichannel Serial
          Port Interface(McSPI) Ports
        • Five Multichannel Buffered Serial Ports (McBSPs)
          • 512-Byte Transmit and Receive Buffer
            (McBSP1/3/4/5)
          • 5-KB Transmit and Receive Buffer (McBSP2)
          • SIDETONE Core Support (McBSP2 and
            McBSP3 Only)For Filter, Gain, and Mix
            Operations
          • 128-Channel Transmit and Receive Mode
          • Direct Interface to I2S and PCM Device and
            TDM Buses
        • HDQ/1-Wire Interface
        • 4 UARTs (One with Infrared Data Association
          [IrDA] and Consumer Infrared [CIR] Modes)
        • 3 Master and Slave High-Speed Inter-Integrated
          Circuit (I2C) Controllers
        • Twelve 32-bit General-Purpose Timers
        • One 32-bit Watchdog Timer
        • One 32-bit 32-kHz Sync Timer
        • Up to 186 General-Purpose I/O (GPIO) Pins
    • Display Subsystem
      • Parallel Digital Output
      • Up to 24-Bit RGB
      • Supports Up to 2 LCD Panels
      • Support for Remote Frame Buffer Interface (RFBI)
        LCD Panels
      • Two 10-Bit Digital-to-Analog Converters (DACs)
        Supporting
        • Composite NTSC/PAL Video
        • Luma/Chroma Separate Video (S-Video)
      • Rotation of 90, 180, and 270 Degrees
      • Resize Images From 1/4x to 8x
      • Color Space Converter
      • 8-Bit Alpha Blending
    • Video Processing Front End (VPFE) 16-Bit Video Input Port
      • RAW Data Interface
      • 75-MHz Maximum Pixel Clock
      • Supports REC656/CCIR656 Standard
      • Supports YCbCr422 Format (8-Bit or 16-Bit with Discrete
        Horizontal and Vertical Sync Signals)
      • Generates Optical Black Clamping Signals
      • Built-in Digital Clamping and Black Level Compensation
      • 10-Bit to 8-Bit A-law Compression Hardware
      • Supports up to 16K Pixels (Image Size) in Horizontal
        and Vertical Directions
    • System Direct Memory Access (sDMA) Controller (32 Logical
      Channels with Configurable Priority)
    • Comprehensive Power, Reset, and Clock Management
    • ARM Cortex-A8 Memory Architecture
      • ARMv7 Architecture
        • In-Order, Dual-Issue, Superscalar Microprocessor Core
        • ARM NEON Multimedia Architecture
        • Over 2x Performance of ARMv6 SIMD
        • Supports Both Integer and Floating-Point SIMD
        • Jazelle RCT Execution Environment Architecture
        • Dynamic Branch Prediction with Branch Target Address
          Cache, Global History Buffer and 8-Entry Return Stack
        • Embedded Trace Macrocell [ETM] Support for
          Noninvasive Debug
        • 16KB of Instruction Cache (4-Way Set-Associative)
        • 16KB of Data Cache (4-Way Set-Associative)
        • 256KB of L2 Cache
      • PowerVR SGX Graphics Accelerator (AM3517 Only)
        • Tile-Based Architecture Delivering up to 10 MPoly/sec
        • Universal Scalable Shader Engine: Multi-threaded Engine
          Incorporating Pixel and Vertex Shader Functionality
        • Industry Standard API Support: OpenGLES 1.1 and
          2.0, OpenVG1.0
        • Fine-Grained Task Switching, Load Balancing, and
          Power Management
        • Programmable, High-Quality Image Anti-Aliasing
      • Endianess
        • ARM Instructions – Little Endian
        • ARM Data – Configurable
      • SDRC Memory Controller
        • 16- and 32-Bit Memory Controller with 1GB of
          Total Address Space
        • Double Data Rate (DDR2) SDRAM, Mobile Double Data Rate
          (mDDR)SDRAM
        • SDRAM Memory Scheduler (SMS) and Rotation Engine
      • General Purpose Memory Controller (GPMC)
        • 16-Bit-Wide Multiplexed Address/Data Bus
        • Up to 8 Chip-Select Pins with 128MB of Address
          Space per Chip-Select Pin
        • Glueless Interface to NOR Flash, NAND Flash (with ECC
          Hamming Code Calculation), SRAM and Pseudo-SRAM
        • Flexible Asynchronous Protocol Control for Interface
          to Custom Logic (FPGA, CPLD, ASICs, and so forth)
        • Nonmultiplexed Address/Data Mode (Limited 2-KB
          Address Space)
      • Test Interfaces
        • IEEE-1149.1 (JTAG) Boundary-Scan Compatible
        • Embedded Trace Macro Interface (ETM)
      • 65-nm CMOS Technology
      • Packages:
        • 491-Pin BGA (17 x 17, 0.65-mm Pitch)
          [ZCN Suffix]
          with Via Channel Array
          Technology
        • 484-Pin PBGA (23 x 23, 1-mm Pitch)
          [ZER Suffix]

      AM3517/05 is a high-performance ARM Cortex-A8 microprocessor with speeds up to 600 MHz. The device offers 3D graphics acceleration while also supporting numerous peripherals, including DDR2, CAN, EMAC, and USB OTG PHY that are well suited for industrial apllications.

      The processor can support other applications, including: Single-board computers Home and industrial automation Human machine Interface

      The device supports high-level operating systems (OSs), such as:

      • Linux®
      • Windows® CE
      • Android™

      The following subsystems are part of the device:

      • Microprocessor unit (MPU) subsystem based on the ARM Cortex-A8 microprocessor
      • PowerVR SGX graphics accelerator (AM3517 device only) subsystem for 3D graphics acceleration to support display and gaming effects
      • Display subsystem with several features for multiple concurrent image manipulation, and a programmable interface supporting a wide variety of displays. The display subsystem also supports NTSC/PAL video out.
      • High-performance interconnects provide high-bandwidth data transfers for multiple initiators to the internal and external memory controllers and to on-chip peripherals. The device also offers a comprehensive clock-management scheme.

      AM3517/05 devices are available in a 491-pin BGA package and a 484-pin PBGA package.

      This AM3517/05 data manual presents the electrical and mechanical specifications for the AM3517/05 Sitara processor.

      AM3517/05 is a high-performance ARM Cortex-A8 microprocessor with speeds up to 600 MHz. The device offers 3D graphics acceleration while also supporting numerous peripherals, including DDR2, CAN, EMAC, and USB OTG PHY that are well suited for industrial apllications.

      The processor can support other applications, including: Single-board computers Home and industrial automation Human machine Interface

      The device supports high-level operating systems (OSs), such as:

      • Linux®
      • Windows® CE
      • Android™

      The following subsystems are part of the device:

      • Microprocessor unit (MPU) subsystem based on the ARM Cortex-A8 microprocessor
      • PowerVR SGX graphics accelerator (AM3517 device only) subsystem for 3D graphics acceleration to support display and gaming effects
      • Display subsystem with several features for multiple concurrent image manipulation, and a programmable interface supporting a wide variety of displays. The display subsystem also supports NTSC/PAL video out.
      • High-performance interconnects provide high-bandwidth data transfers for multiple initiators to the internal and external memory controllers and to on-chip peripherals. The device also offers a comprehensive clock-management scheme.

      AM3517/05 devices are available in a 491-pin BGA package and a 484-pin PBGA package.

      This AM3517/05 data manual presents the electrical and mechanical specifications for the AM3517/05 Sitara processor.

      下载

      More Information

      Several of the documents associated to device are restricted and must go through export control. Depending on where you are and how your IP address registers with the TI servers, you may have problems accessing those particular documents.

      技术文档

      star = TI 精选相关文档
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      显示全部 15 项
      类型 标题 下载最新的英文版本 日期
      * 数据表 AM3517, AM3505 Sitara Processors 数据表 (Rev. F) 2014年 7月 10日
      * 勘误表 AM3517/05 ARM Microprocessor Silicon Errata (Rev. E) 2016年 9月 21日
      * 用户指南 AM35x ARM Microprocessor Technical Reference Manual (Rev. C) 2013年 11月 22日
      更多文献资料 From Start to Finish: A Product Development Roadmap for Sitara™ Processors 2020年 12月 16日
      技术文章 Bringing the next evolution of machine learning to the edge 2018年 11月 27日
      用户指南 How-To and Troubleshooting Guide for PRU-ICSS PROFIBUS 2018年 9月 24日
      技术文章 How quality assurance on the Processor SDK can improve software scalability 2018年 8月 22日
      白皮书 Enable security and amp up chip performance w/ hardware-accelerated cryptograpy (Rev. A) 2016年 8月 11日
      技术文章 Clove: Low-Power video solutions based on Sitara™ AM57x processors 2016年 7月 21日
      技术文章 Spring has sprung. A sale has sprung. 2016年 4月 4日
      应用手册 AM3517/05 电源参考设计 3.6V 至 6.3V 输入、高效率、集成式 5 路输出 PMIC 下载英文版本 2010年 10月 8日
      应用手册 TMS320C6457 Hardware Design Guide 2010年 8月 5日
      应用手册 AM35x Power Estimation Spreadsheet 2010年 5月 24日
      应用手册 AM35x VCA PCB Layout 2010年 5月 24日
      应用手册 OMAP35x to AM35x Hardware Migration Guide 2010年 5月 24日

      设计与开发

      有关其他条款或所需资源,请点击下面的任何链接来查看详情页面。

      调试探针

      TMDSEMU200-U — Spectrum Digital XDS200 USB 仿真器

      Spectrum Digital XDS200 是最新 XDS200 系列 TI 处理器调试探针(仿真器)的首个模型。XDS200 系列拥有超低成本 XDS100 与高性能 XDS560v2 之间的低成本与高性能的完美平衡。此外,对于带有嵌入式缓冲跟踪器 (ETB) 的所有 ARM 和 DSP 处理器,所有 XDS 调试探针均支持内核和系统跟踪。

      Spectrum Digital XDS200 通过 TI 20 引脚连接器(带有适合 TI 14 引脚、TI 10 引脚和 ARM 20 引脚的多个适配器)连接到目标板,而通过 USB2.0 高速连接 (480Mbps) 连接到主机 PC。要在主机 PC 上运行,还需要 Code Composer Studio™ IDE 许可证。

      (...)

      现货
      数量限制: 3
      调试探针

      TMDSEMU560V2STM-U — Blackhawk XDS560v2 系统跟踪 USB 仿真器

      XDS560v2 System Trace 是 XDS560v2 系列高性能 TI 处理器调试探针(仿真器)的第一种型号。XDS560v2 是 XDS 系列调试探针中性能最高的一款,同时支持传统 JTAG 标准 (IEEE1149.1) 和 cJTAG (IEEE1149.7)。

      XDS560v2 System Trace 在其巨大的外部存储器缓冲区中加入了系统引脚跟踪。这种外部存储器缓冲区适用于指定的 TI 器件,通过捕获相关器件级信息,获得准确的总线性能活动和吞吐量,并对内核和外设进行电源管理。此外,对于带有嵌入式缓冲跟踪器 (ETB) 的所有 ARM 和 DSP 处理器,所有 XDS 调试探针均支持内核和系统跟踪。

      Blackhawk XDS560v2 System Trace 通过 MIPI HSPT 60 引脚连接器(带有适合 TI 14 引脚、TI 20 引脚和 ARM 20 (...)

      现货
      数量限制: 1
      调试探针

      TMDSEMU560V2STM-UE — Spectrum Digital XDS560v2 系统跟踪 USB 和以太网

      XDS560v2 System Trace 是 XDS560v2 系列高性能 TI 处理器调试探针(仿真器)的第一种型号。XDS560v2 是 XDS 系列调试探针中性能最高的一款,同时支持传统 JTAG 标准 (IEEE1149.1) 和 cJTAG (IEEE1149.7)。

      XDS560v2 System Trace 在其巨大的外部存储器缓冲区中加入了系统引脚跟踪。这种外部存储器缓冲区适用于指定的 TI 器件,通过捕获相关器件级信息,获得准确的总线性能活动和吞吐量,并对内核和外设进行电源管理。此外,对于带有嵌入式缓冲跟踪器 (ETB) 的所有 ARM 和 DSP 处理器,所有 XDS 调试探针均支持内核和系统跟踪。

      Spectrum Digital XDS560v2 System Trace 通过 MIPI HSPT 60 引脚连接器(适合 TI 14 引脚、TI 20 引脚、ARM 20 引脚和 TI 60 (...)

      现货
      数量限制: 1
      软件开发套件 (SDK)

      ANDROIDSDK-SITARA — 用于 Sitara 微处理器的 Android 开发套件

      虽然起初专为移动手持终端而设计,Android 操作系统仍允许嵌入式应用的设计人员轻松为产品增加高级操作系统。 与 Google 联合开发的 Android 是一套可立即实现集成和生产的全面操作系统。


      Android 操作系统的亮点在于:

      • 完整的开放源码软件解决方案
      • 基于 Linux
      • 针对商业开发的简洁许可条款 (Apache)
      • 包含一个完整的应用框架
      • 允许通过 Java 轻松集成定制开发应用
      • 开包即用的多媒体、图形和图形用户界面
      • 大量 Android 和应用开发人员供随时调遣

       

      软件开发套件 (SDK)

      LINUXEZSDK-SITARA — 用于 Sitara™ ARM® 处理器的 Linux EZ 软件开发套件 (EZSDK)

      Linux EZ 软件开发套件 (EZ SDK) 为 Sitara™ 开发人员提供了提供了轻松设置、开包即用的快捷体验(特定于且突出了 Sitara ARM9® 和 Cortex™ -A8® (...)
      代码示例或演示

      DEMOAPP-AM35X — 演示 - AM35x 应用示例和演示代码

      驱动程序或库

      WIND-3P-VXWORKS-LINUX-OS — Wind River 处理器 VxWorks 和 Linux 操作系统

      Wind River 是提供物联网 (IoT) 软件的全球领导者。自 1981 年以来,该公司的技术一直在为全世界最安全的器件提供支持,现在已广泛应用于超过 20 亿产品中。Wind River 提供全面的边缘到云产品系列,并针对这些产品提供世界一流的全球专业服务和备受赞誉的客户支持。Wind River 的 VxWorks 和 Linux 产品支持各种 TI 处理器。

      如需了解有关 Wind River 的更多信息,请访问 https://www.windriver.com

      由 Wind River Systems 提供
      IDE、配置、编译器或调试器

      CCSTUDIO-SITARA — 适用于 Sitara™ 处理器的 Code Composer Studio (CCS) 集成开发环境 (IDE)

      Download the latest version of Code Composer Studio

      Code Composer Studio™ - Integrated Development Environment for Sitara™ ARM© Processors

       

      Code Composer Studio is an integrated development environment (IDE) that supports TI's Microcontroller and Embedded Processors portfolio. Code Composer Studio comprises a suite of tools used to develop and debug (...)

      操作系统 (OS)

      GHS-3P-INTEGRITY-RTOS — Green Hills INTEGRITY RTOS

      The flagship of Green Hills Software operating systems—the INTEGRITY RTOS—is built around a partitioning architecture to provide embedded systems with total reliability, absolute security, and maximum real-time performance. With its leadership pedigree underscored by certifications in a (...)
      由 Green Hills Software 提供
      操作系统 (OS)

      MG-3P-NUCLEUS-RTOS — Mentor Graphics Nucleus RTOS

      Software driven power management is crucial for battery operated or low power budget embedded systems. Embedded developers can now take advantage of the latest power saving features in popular TI devices with the built-in Power Management Framework in the Nucleus RTOS. Developers specify application (...)
      由 Mentor Graphics Corporation 提供
      操作系统 (OS)

      QNX-3P-NEUTRINO-RTOS — QNX Neutrino RTOS

      The QNX Neutrino® Realtime Operating System (RTOS) is a full-featured and robust RTOS designed to enable the next-generation of products for automotive, medical, transportation, military and industrial embedded systems. Microkernel design and modular architecture enable customers to create (...)
      由 QNX Software Systems 提供
      软件编程工具

      FLASHTOOL — 用于 AM35x、AM37x、DM37x 和 OMAP35x 器件的 FlashTool

      Flash Tool is a Windows-based application that can be used to transfer binary images from a host PC to TI Sitara AM35x, AM37x, DM37x and OMAP35x target platforms.


      Additional Information:

      TI GForge - Welcome to gforge.ti.com

      TI E2E Community

      软件编程工具

      UNIFLASH — UniFlash stand-alone flash tool for microcontrollers, Sitara™ processors and SimpleLink™ family

      支持的器件:CC13xx、CC25xx、CC26xx、CC3x20、CC3x30、CC3x35、Tiva、C2000、MSP43x、Hercules、PGA9xx、IWR12xx、IWR14xx、IWR16xx、IWR18xx、IWR68xx、AWR12xx、AWR14xx、AWR16xx、AWR18xx。  仅限命令行:AM335x、AM437x、AM571x、AM572x、AM574x、AM65XX、K2G

      CCS Uniflash 是一个独立工具,用于编程 TI MCU 的片上闪存内存和 Sitara 处理器的板载闪存内存。Uniflash 具有 GUI、命令行和脚本接口。CCS Uniflash 免费提供。

      仿真模型

      AM35x ZCN IBIS Model (Rev. A)

      SPRM451A.ZIP (1436 KB) - IBIS Model
      仿真模型

      AM35x ZCN BSDL Model (Rev. A)

      SPRM452A.ZIP (11 KB) - BSDL Model
      仿真模型

      AM35x ZER IBIS Model (Rev. A)

      SPRM504A.ZIP (1431 KB) - IBIS Model
      仿真模型

      AM35x ZER BSDL Model

      SPRM505.ZIP (10 KB) - BSDL Model
      计算工具

      CLOCKTREETOOL — Clock Tree Tool for Sitara™ ARM® Processors

      The Clock Tree Tool (CTT) for Sitara™ ARM®, Automotive, and Digital Signal Processors is an interactive clock tree configuration software that provides information about the clocks and modules in these TI devices. It allows the user to:
      • Visualize the device clock tree
      • Interact with clock tree elements (...)
      计算工具

      PINMUXTOOL — 用于 ARM® 和 F2837xD 微控制器的引脚复用实用程序

      支持的器件: (...)
      计算工具

      POWEREST — 功耗估算工具 (PET)

      设计工具

      PROCESSORS-3P-SEARCH — Arm-based MPU, arm-based MCU and DSP third-party search tool

      TI has partnered with companies to offer a wide range of software, tools, and SOMs using TI processors to accelerate your path to production. Download this search tool to quickly browse our third-party solutions and find the right third-party to meet your needs. The software, tools and modules (...)
      封装 引脚 下载
      BGA (ZER) 484 了解详情
      NFBGA (ZCN) 491 了解详情

      订购与质量

      包含信息:
      • RoHS
      • REACH
      • 器件标识
      • 引脚镀层/焊球材料
      • MSL 等级/回流焊峰值温度
      • MTBF/FIT 估算
      • 材料成分
      • 认证摘要
      • 持续可靠性监测

      推荐产品的参数、评估模块或参考设计可能与此 TI 产品相关

      支持与培训

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