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數據轉換器
數位轉類比轉換器 (DAC)
高速 DAC (>10 MSPS)

DAC34SH84

現行

四通道、16 位元、1.5-GSPS、1x-16x 內插數位轉類比轉換器 (DAC)

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產品規格表

DAC34SH84

現行
產品規格表 立即訂購

產品詳細資料

Resolution (Bits) 16 Number of DAC channels 4 Interface type DDR LVDS, Parallel LVDS Sample/update rate (Msps) 1500 Features Ultra High Speed Rating Catalog Interpolation 16x, 1x, 2x, 4x, 8x Power consumption (typ) (mW) 1448 SFDR (dB) 78 Architecture Current Source Operating temperature range (°C) -40 to 85 Reference type Int
Resolution (Bits) 16 Number of DAC channels 4 Interface type DDR LVDS, Parallel LVDS Sample/update rate (Msps) 1500 Features Ultra High Speed Rating Catalog Interpolation 16x, 1x, 2x, 4x, 8x Power consumption (typ) (mW) 1448 SFDR (dB) 78 Architecture Current Source Operating temperature range (°C) -40 to 85 Reference type Int
NFBGA (ZAY) 196 144 mm² 12 x 12
  • Low Power: 1.8 W at 1.5 GSPS, Full Operating
    Condition
  • Multi-DAC Synchronization
  • Selectable 2×, 4×, 8×, 16× Interpolation Filter
    • Stop-Band Attenuation > 90 dBc
  • Flexible On-Chip Complex Mixing
    • Two Independent Fine Mixers With 32-Bit
      NCOs
    • Power-Saving Coarse Mixers: ±n × fS/8
  • High-Performance, Low-Jitter Clock-Multiplying
    PLL
  • Digital I and Q Correction
    • Gain, Phase and Offset
  • Digital Inverse Sinc Filters
  • 32-Bit DDR Flexible LVDS Input Data Bus
    • 8-Sample Input FIFO
    • Supports Data Rates up to 750 MSPS
    • Data Pattern Checker
    • Parity Check
  • Temperature Sensor
  • Differential Scalable Output: 10 mA to 30 mA
  • 196-Ball, 12-mm × 12-mm NFBGA
  • Low Power: 1.8 W at 1.5 GSPS, Full Operating
    Condition
  • Multi-DAC Synchronization
  • Selectable 2×, 4×, 8×, 16× Interpolation Filter
    • Stop-Band Attenuation > 90 dBc
  • Flexible On-Chip Complex Mixing
    • Two Independent Fine Mixers With 32-Bit
      NCOs
    • Power-Saving Coarse Mixers: ±n × fS/8
  • High-Performance, Low-Jitter Clock-Multiplying
    PLL
  • Digital I and Q Correction
    • Gain, Phase and Offset
  • Digital Inverse Sinc Filters
  • 32-Bit DDR Flexible LVDS Input Data Bus
    • 8-Sample Input FIFO
    • Supports Data Rates up to 750 MSPS
    • Data Pattern Checker
    • Parity Check
  • Temperature Sensor
  • Differential Scalable Output: 10 mA to 30 mA
  • 196-Ball, 12-mm × 12-mm NFBGA

The DAC34SH84 is a very low-power, high-dynamic range, quad-channel, 16-bit digital-to-analog converter (DAC) with a sample rate as high as 1.5 GSPS.

The device includes features that simplify the design of complex transmit architectures: 2× to 16× digital interpolation filters with over 90 dB of stop-band attenuation simplify the data interface and reconstruction filters. Independent complex mixers allow flexible carrier placement.

A high-performance low-jitter clock multiplier simplifies clocking of the device without significant impact on the dynamic range. The digital quadrature modulator correction (QMC) enables complete IQ compensation for gain, offset and phase between channels in direct upconversion applications.

Digital data is input to the device through a 32-bit wide LVDS data bus with on-chip termination. The wide bus allows the processing of high-bandwidth signals. The device includes a FIFO, data pattern checker, and parity test to ease the input interface. The interface also allows full synchronization of multiple devices.

The device is characterized for operation over the entire industrial temperature range of –40°C to 85°C and is available in a 196-ball, 12-mm × 12-mm, 0.8-mm pitch NFBGA package.

The DAC34SH84 low-power, high-bandwidth support, superior crosstalk, high dynamic range, and features are an ideal fit for next-generation communication systems.

The DAC34SH84 is a very low-power, high-dynamic range, quad-channel, 16-bit digital-to-analog converter (DAC) with a sample rate as high as 1.5 GSPS.

The device includes features that simplify the design of complex transmit architectures: 2× to 16× digital interpolation filters with over 90 dB of stop-band attenuation simplify the data interface and reconstruction filters. Independent complex mixers allow flexible carrier placement.

A high-performance low-jitter clock multiplier simplifies clocking of the device without significant impact on the dynamic range. The digital quadrature modulator correction (QMC) enables complete IQ compensation for gain, offset and phase between channels in direct upconversion applications.

Digital data is input to the device through a 32-bit wide LVDS data bus with on-chip termination. The wide bus allows the processing of high-bandwidth signals. The device includes a FIFO, data pattern checker, and parity test to ease the input interface. The interface also allows full synchronization of multiple devices.

The device is characterized for operation over the entire industrial temperature range of –40°C to 85°C and is available in a 196-ball, 12-mm × 12-mm, 0.8-mm pitch NFBGA package.

The DAC34SH84 low-power, high-bandwidth support, superior crosstalk, high dynamic range, and features are an ideal fit for next-generation communication systems.
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技術文件

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重要文件 類型 標題 格式選項 日期
* Data sheet DAC34SH84 Quad-Channel, 16-Bit, 1.5 GSPS Digital-to-Analog Converter (DAC) datasheet (Rev. E) PDF | HTML 2015年 10月 1日
Application note Effects of Clock Spur on High Speed DAC Performance (Rev. A) 2015年 5月 18日
Design guide TSW308x Wideband Digital to RF Transmit Solution Design Guide 2013年 9月 3日
Design guide Analog Interfacing Networks for DAC348x and Modulators (TIDA-00077) (Rev. A) 2013年 8月 14日
Application note Using DAC348x with Fault Detection and Auto Output Shut-off Feature 2013年 2月 21日
Application note DAC348x Device Configuration and Synchronization 2013年 2月 18日
Application note High Speed, Digital-to-Analog Converters Basics (Rev. A) 2012年 10月 23日
User guide Interfacing Altera FPGAs to ADS4249 and DAC3482 (TIDA-00069 Reference Guide) 2012年 7月 10日
User guide TSW1400 Pattern Generators 2012年 5月 3日
Application note Configuring and Optimizing On-Chip PLL of the DAC348x 2012年 1月 26日
User guide TSW3085EVM ACPR and EVM Measurements (TIDA-00076 Reference Guide) 2011年 12月 29日

設計與開發

如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發模組 (EVM) 的 GUI

DATACONVERTERPRO-SW — High Speed Data Converter Pro GUI Installer, v5.31

This high-speed data converter pro GUI is a PC (Windows® XP/7/10 compatible) program designed to aid in evaluation of most TI high-speed data converter [analog-to-digital converter (ADC) and digital-to-analog converter (DAC)] and analog front-end (AFE) platforms. Designed to support the entire (...)

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開發模組 (EVM) 的 GUI

SLAC483 — DAC348x EVM Software GUI

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支援產品和硬體
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開發模組 (EVM) 的 GUI

SLAC507 — TSW308x EVM Software

支援產品和硬體

支援產品和硬體
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模擬型號

DAC34H84/DAC34SH84 IBIS Model (Rev. A)

SLAM078A.ZIP (92 KB) - IBIS Model
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模擬型號

TINA-TI SPICE Models: Analog Interfacing Networks for DAC348x and Modulators

SLUC481.ZIP (198 KB) - TINA-TI Spice Model
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PCB 佈局

TSW2200EVM Design Package PCB

SLWR039.ZIP (3979 KB)
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配置圖

TSW2110EVM Design Package board rev B

SLAR064.ZIP (1580 KB)
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模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI 是有助於評估類比電路功能的設計和模擬環境。這款全功能設計和模擬套件使用 Cadence® 的類比分析引擎。PSpice for TI 包括業界最大的模型庫之一，涵蓋我們的類比和電源產品組合，以及特定類比行為模型，且使用無需支付費用。

PSpice for TI 設計和模擬環境可讓您使用其內建函式庫來模擬複雜的混合訊號設計。在進行佈局和製造之前，建立完整的終端設備設計和解決方案原型，進而縮短上市時間並降低開發成本。 

在 PSpice for TI 設計與模擬工具中，您可以搜尋 TI (...)
要求
參考設計

TIDA-00077 — 適用於 DAC348x 和調變器的類比介面網路

The analog interface circuits in this reference design are often used between current-source based digital-to analog converters (DAC) and quadrature modulators. While the DAC348x is used as an example of a TI high-speed DAC, the circuits can be applied to other current-source based converters with (...)
Design guide: PDF
電路圖: PDF
參考設計

TIDA-00072 — 寬頻數位至射頻發送解決方案

The TSW308x is an example design of a wideband digital to RF transmit solution capable of generating 600 MHz of contiguous RF spectrum.  The system provides a reference on how to use the DAC34x8x, TRF3705 IQ modulator and LMK0480x to achieve this.  This reference EVM coupled with a (...)
Design guide: PDF
電路圖: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
NFBGA (ZAY) 196 Ultra Librarian
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