LM15851

現行

12 位元、4.0-GSPS、RF 取樣寬頻接收器

立即訂購

產品規格表

document-pdfAcrobat LM15851 Ultra-Wideband RF Sampling Subsystem datasheet (Rev. E) (英文) PDF | HTML

LM15851

現行

產品規格表

立即訂購

產品詳細資料

Number of input channels

Resolution (Bits)

Sample rate (max) (Msps)

4000

Features

Decimating Filter, Differential Inputs, Out of Range Indicator, Power Down, Ultra High Speed

Analog input BW (MHz)

3300

SNR (dB)

59.9

Power consumption (typ) (mW)

2000

Operating temperature range (°C)

-40 to 85

Rating

Catalog

Number of input channels

Resolution (Bits)

Sample rate (max) (Msps)

4000

Features

Decimating Filter, Differential Inputs, Out of Range Indicator, Power Down, Ultra High Speed

Analog input BW (MHz)

3300

SNR (dB)

59.9

Power consumption (typ) (mW)

2000

Operating temperature range (°C)

-40 to 85

Rating

Catalog

VQFNP (NKE)

100 mm² 10 x 10

Excellent Noise and Linearity up to and beyond F_IN = 3 GHz
Configurable DDC
Decimation Factors from 4 to 32 (Complex Baseband Out)
Usable Output Bandwidth of 800 MHz at
4x Decimation and 4000 MSPS
Usable Output Bandwidth of 100 MHz at
32x Decimation and 4000 MSPS
Low Pin-Count JESD204B Subclass 1 Interface
Automatically Optimized Output Lane Count
Embedded Low Latency Signal Range Indication
Low Power Consumption
Key Specifications:
- Max Sampling Rate: 4000 MSPS
- Min Sampling Rate: 1000 MSPS
- DDC Output Word Size: 15-Bit Complex (30 bits total)
- IMD3: −64 dBc (F_IN = 2140 MHz ± 30 MHz at −13 dBFS)
- FPBW (–3 dB): 3.2 GHz
- Supply Voltages: 1.9 V and 1.2 V
- Power Consumption
  - Decimate by 10 (4000 MSPS): 2 W
  - Power Down Mode: <50 mW

Excellent Noise and Linearity up to and beyond F_IN = 3 GHz
Configurable DDC
Decimation Factors from 4 to 32 (Complex Baseband Out)
Usable Output Bandwidth of 800 MHz at
4x Decimation and 4000 MSPS
Usable Output Bandwidth of 100 MHz at
32x Decimation and 4000 MSPS
Low Pin-Count JESD204B Subclass 1 Interface
Automatically Optimized Output Lane Count
Embedded Low Latency Signal Range Indication
Low Power Consumption
Key Specifications:
- Max Sampling Rate: 4000 MSPS
- Min Sampling Rate: 1000 MSPS
- DDC Output Word Size: 15-Bit Complex (30 bits total)
- IMD3: −64 dBc (F_IN = 2140 MHz ± 30 MHz at −13 dBFS)
- FPBW (–3 dB): 3.2 GHz
- Supply Voltages: 1.9 V and 1.2 V
- Power Consumption
  - Decimate by 10 (4000 MSPS): 2 W
  - Power Down Mode: <50 mW

The LM15851 device is a wideband sampling and digital tuning device. Texas Instruments’ giga-sample analog-to-digital converter (ADC) technology enables a large block of frequency spectrum to be sampled directly at RF. An integrated DDC (Digital Down Converter) provides digital filtering and down-conversion. The selected frequency block is made available on a JESD204B serial interface. Data is output as baseband 15-bit complex information for ease of downstream processing. Based on the digital down-converter (DDC) decimation and link output rate settings, this data is output on 1 to 5 lanes of the serial interface.

The LM15851 device is available in a 68-pin VQFN package. The device operates over the Industrial (–40°C ≤ T_A ≤ 85°C) ambient temperature range.

filter

尋找其它 RF 接收器

下載觀看有字幕稿的影片影片

技術文件

star

=TI 所選的此產品重要文件

找不到結果。請清除您的搜尋條件，然後再試一次。

檢視所有 3

重要文件	類型	標題	格式選項	日期
*	Data sheet	LM15851 Ultra-Wideband RF Sampling Subsystem datasheet (Rev. E)	PDF \| HTML	2017年 10月 19日
	Application note	System solution for avionics & defense		2015年 9月 23日
	White paper	Ready to make the jump to JESD204B? White Paper (Rev. B)		2015年 3月 19日

設計與開發

如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發模組 (EVM) 的 GUI

DATACONVERTERPRO-SW — High Speed Data Converter Pro GUI Installer, v5.31

This high-speed data converter pro GUI is a PC (Windows® XP/7/10 compatible) program designed to aid in evaluation of most TI high-speed data converter [analog-to-digital converter (ADC) and digital-to-analog converter (DAC)] and analog front-end (AFE) platforms. Designed to support the entire (...)

支援產品和硬體

下載