產品詳細資料

Sample rate (max) (Msps) 25 Resolution (Bits) 18 Number of input channels 2 Interface type Serial LVDS Analog input BW (MHz) 900 Features High Dynamic Range, High Performance, Low Power, Ultra High Speed Rating Catalog Peak-to-peak input voltage range (V) 3.2 Power consumption (typ) (mW) 110 Architecture SAR SNR (dB) 86 ENOB (Bits) 13.7 SFDR (dB) 90 Operating temperature range (°C) -40 to 105 Input buffer No
Sample rate (max) (Msps) 25 Resolution (Bits) 18 Number of input channels 2 Interface type Serial LVDS Analog input BW (MHz) 900 Features High Dynamic Range, High Performance, Low Power, Ultra High Speed Rating Catalog Peak-to-peak input voltage range (V) 3.2 Power consumption (typ) (mW) 110 Architecture SAR SNR (dB) 86 ENOB (Bits) 13.7 SFDR (dB) 90 Operating temperature range (°C) -40 to 105 Input buffer No
WQFN (RSB) 40 25 mm² 5 x 5
  • Dual channel ADC
  • 18-bit 10, 25, 65 MSPS ADC
  • Noise floor: -160 dBFS/Hz
  • Low power and optimized power scaling: 53 mW/ch (10 MSPS) to 94 mW/ch (65 MSPS)
  • Latency: 1-2 clock cycles
  • 18-bit, no missing codes
  • INL/DNL: ±7/ ±0.7 LSB (typical)
  • Reference: external or internal
  • Input bandwidth: 900 MHz (3-dB)
  • Industrial temperature range: -40 to +105°C
  • On-chip digital filter (optional)
    • Decimation by 2, 4, 8, 16, 32
    • 32-bit NCO
  • Serial LVDS digital interface (2-, 1- and 1/2-wire)
  • Small footprint: 40-QFN (5x5 mm) package
  • Spectral performance (fIN = 5 MHz):
    • SNR: 83.8 dBFS
    • SFDR: 89 dBc HD2, HD3
    • SFDR: 101 dBFS Worst spur
  • Spectral performance (fIN = 20 MHz):
    • SNR: 82.6 dBFS
    • SFDR: 85 dBc HD2, HD3
    • SFDR: 97 dBFS Worst spur
  • Dual channel ADC
  • 18-bit 10, 25, 65 MSPS ADC
  • Noise floor: -160 dBFS/Hz
  • Low power and optimized power scaling: 53 mW/ch (10 MSPS) to 94 mW/ch (65 MSPS)
  • Latency: 1-2 clock cycles
  • 18-bit, no missing codes
  • INL/DNL: ±7/ ±0.7 LSB (typical)
  • Reference: external or internal
  • Input bandwidth: 900 MHz (3-dB)
  • Industrial temperature range: -40 to +105°C
  • On-chip digital filter (optional)
    • Decimation by 2, 4, 8, 16, 32
    • 32-bit NCO
  • Serial LVDS digital interface (2-, 1- and 1/2-wire)
  • Small footprint: 40-QFN (5x5 mm) package
  • Spectral performance (fIN = 5 MHz):
    • SNR: 83.8 dBFS
    • SFDR: 89 dBc HD2, HD3
    • SFDR: 101 dBFS Worst spur
  • Spectral performance (fIN = 20 MHz):
    • SNR: 82.6 dBFS
    • SFDR: 85 dBc HD2, HD3
    • SFDR: 97 dBFS Worst spur

The ADC3681, 82, 83 (ADC368x) is a low noise, ultra-low power 18-bit 65 MSPS high-speed dual channel ADC family. Designed for lowest noise performance, it delivers a noise spectral density of -160 dBFS/Hz combined with excellent linearity and dynamic range. The ADC368x offers excellent DC precision together with IF sampling support which makes it suited for a wide range of applications. High-speed control loops benefit from the short latency as low as only 1 clock cycle. The ADC consumes only 94 mW/ch at 65 Msps and its power consumption scales well with lower sampling rates.

The ADC368x uses a serial LVDS (SLVDS) interface to output the data which minimizes the number of digital interconnects. The device supports two-lane, one-lane and half-lane options. The ADC36xx is a pin to pin compatible family of ADCs with 16 and 18-bit resolution and different speed grades. It comes in a 40-pin QFN package (5 x 5mm) and supports the extended industrial temperature range from -40 to +105⁰C.

The ADC3681, 82, 83 (ADC368x) is a low noise, ultra-low power 18-bit 65 MSPS high-speed dual channel ADC family. Designed for lowest noise performance, it delivers a noise spectral density of -160 dBFS/Hz combined with excellent linearity and dynamic range. The ADC368x offers excellent DC precision together with IF sampling support which makes it suited for a wide range of applications. High-speed control loops benefit from the short latency as low as only 1 clock cycle. The ADC consumes only 94 mW/ch at 65 Msps and its power consumption scales well with lower sampling rates.

The ADC368x uses a serial LVDS (SLVDS) interface to output the data which minimizes the number of digital interconnects. The device supports two-lane, one-lane and half-lane options. The ADC36xx is a pin to pin compatible family of ADCs with 16 and 18-bit resolution and different speed grades. It comes in a 40-pin QFN package (5 x 5mm) and supports the extended industrial temperature range from -40 to +105⁰C.

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我們的 ADC3660 系列贏得 2021 年世界電子產品成就獎 (WEAA) 放大器/資料轉換類別的年度最佳產品。

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* Data sheet ADC368x 18-bit 0.5 to 65-MSPS Low Noise Ultra-low Power Dual Channel ADC datasheet (Rev. B) PDF | HTML 2022年 10月 3日
Application note Practical Clocking Considerations That Give Your Next High-Speed Converter Design an Edge (Rev. A) PDF | HTML 2025年 4月 11日
Application note High Speed SAR ADC: Data Rate, Performance, and Pin Count Optimization PDF | HTML 2020年 12月 8日
Analog Design Journal How to simplify AFE filtering via high‐speed ADCs with internal digital filters 2020年 1月 10日

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ADC3683EVM — ADC3683 雙通道、18 位元、65MSPS、低雜訊、超低功耗 ADC 評估模組

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TSW1418EVM — 資料擷取評估模組

TSW1418EVM 是入門級 FMC 介面資料擷取卡,可用於評估高速類比轉數位轉換器 (ADC) 的性能。TSW1418EVM 可用於展示資料表性能規格,做法是在使用高品質、低抖動時脈和高品質輸入頻率時,透過低電壓差動訊號 (LVDS) 或互補式金屬氧化半導體 (CMOS) 介面擷取取樣資料。TSW1418EVM 使用基於 Xilinx® 的韌體,可動態配置來支援高達 950Mbps 的 LVDS 速度,和多達 18 個資料輸出。隨附高速資料轉換器專業圖形使用者介面 (HSDC Pro GUI) 的 TSW1418EVM 是一套完整系統,可擷取及評估 ADC EVM 的資料樣本。
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WQFN (RSB) 40 Ultra Librarian

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