ADC3643
- Dual channel
- 14-bit 10/25/65 MSPS ADC
- Noise floor: –155 dBFS/Hz
- Ultra-low power with optimized power scaling: 29 mW/ch (10 MSPS) to 72 mW/ch (65 MSPS)
- Latency: 1 clock cycle
- 14-Bit, no missing codes
- INL: ±0.6 LSB; DNL: ±0.2 LSB
- Reference: external or internal
- Industrial temperature range: –40°C to +105°C
- On-chip digital filter (optional)
- Decimation by 2, 4, 8, 16, 32
- 32-bit NCO
- DDR and Serial CMOS interface
- Small footprint: 40-VQFN (5 mm × 5 mm) package
- Single 1.8-V supply
- Spectral performance (fIN = 5 MHz):
- SNR: 79.0 dBFS
- SFDR: 93-dBc HD2, HD3
- SFDR: 101-dBFS worst spur
- Spectral performance (fIN = 64 MHz):
- SNR: 74.0 dBFS
- SFDR: 84-dBc HD2, HD3
- SFDR: 90-dBFS worst spur
The ADC364x family of devices are low-noise, ultra-low power, 14-bit, 10-MSPS to 65-MSPS dual-channel, high-speed analog-to-digital converters (ADCs). Designed for low power consumption, these devices deliver a noise spectral density of –155 dBFS/Hz, combined with excellent linearity and dynamic range. The ADC364x offers very good dc precision, together with IF sampling support, which make the device an excellent choice for a wide range of applications. High-speed control loops benefit from the short latency of only one clock cycle. The ADC consumes only 72 mW/ch at 65 MSPS, and power consumption scales well with lower sampling rates.
The ADC364x use a DDR or serial CMOS interface to output the data offering lowest power digital interface, together with flexibility to minimize the number of digital interconnects. These devices are a pin-to-pin compatible family with different speed grades. These devices support the extended industrial temperature range of –40 to +105⁰C.
我們的 ADC3660 系列贏得 2021 年世界電子產品成就獎 (WEAA) 放大器/資料轉換類別的年度最佳產品。
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | ADC364x 14-bit, 10-MSPS to 65-MSPS, Low-Noise, Low Power Dual Channel ADC datasheet (Rev. A) | PDF | HTML | 2022/5/20 | ||
| 應用說明 | Practical Clocking Considerations That Give Your Next High-Speed Converter Design an Edge (Rev. A) | PDF | HTML | 2025/4/11 | |||
| 應用說明 | Evaluating High-Speed, RF ADC Converter Front-end Architectures | PDF | HTML | 2025/3/26 | |||
| 應用說明 | High-Speed ADC: How to Properly Terminate Single-ended CMOS Digital Outputs | 2020/12/9 | ||||
| 應用說明 | High Speed SAR ADC: Data Rate, Performance, and Pin Count Optimization | PDF | HTML | 2020/12/8 | |||
| 類比設計期刊 | How to simplify AFE filtering via high‐speed ADCs with internal digital filters | 2020/1/10 |
設計與開發
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ADC3643EVM — 適用於雙通道、14 位元、65MSPS、低雜訊、超低功耗 ADC 的 ADC3643 評估模組
DATACONVERTERPRO-SW — 高速資料轉換器 Pro GUI 安裝程式，v5.31
這款高速資料轉換器專業 GUI 是一款 PC（與 Windows® XP/7/10 相容）程式，旨在協助評估大多數 TI 高速資料轉換器 [類比轉數位轉換器 (ADC) 和數位轉類比轉換器 (DAC)] 和類比前端 (AFE) 平台。DATACONVERTERPRO-SW 旨在支援整個 TSW14xxx 系列資料擷取和模式產生卡，為時域和頻域中的資料轉換器分析提供強大且快速的解決方案，並支援單音、多音和調變訊號。此 GUI 也與 TI 模式產生 GUI 相容，可快速合成單音、多音和調變訊號。
使用者可以向 DATACONVERTERPRO-SW 提供自訂模式，以載入到 TI DAC。支援從 (...)
SBAR014 — ADC3643EVM Design Files
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| WQFN (RSB) | 40 | Ultra Librarian |
訂購與品質
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。