In ultra-low power mode, the system
interconnect is used to fill up the DMA buffers to store all the data required to
display a full frame. Then, the system interconnect is not used anymore to fetch new
pixels for the following frames. The data are fetched once into the DMA buffer and
then the following frames re-use the DMA buffer to display on the screen.
The programming of the ultra-low
power mode is independent for each pipeline and is achieved via the DSS_VID_ATTRIBUTES[24]
SELFREFRESH register bit. One pipeline may have all frame pixels into the DMA buffer
and other pipeline may have to refill the DMA buffers along the display scan,
because the frame buffer is too big to be stored in the DMA buffer.
Two ultra-low power modes can be
entered, manual or automatic mode:
- Manual self-refresh mode:
Starting self-refresh mode is done manually by setting the SELFREFRESH bit
to 0x1 after capturing a frame in the DMA buffers. Self-refresh mode is
stopped by setting the SELFREFRESH bit to 0x0. Software must first disable
the SELFREFRESH bit during at least one frame in order to capture the data
(by setting the GOBIT register bit of the video port the pipeline is
associated with). Once the DSS_VP1_CONTROL[5]
GOBIT bit has been set, the software must read the GOBIT bit to ensure that
the frame has been loaded into the buffer, then it can set the SELFREFRESH
bit to 1. Once SELFREFRESH is enabled, the fetch of data from the system
memory is stopped for the following frames. The software needs to reset the
SELFREFRESH bit in order to restart fetching data from system memory.
- Automatic self-refresh mode:
By setting the DSS_VIDL1_ATTRIBUTES[17] SELFREFRESHAUTO bit to 0x1, the
transition from disabled to enabled for self-refresh mode is controlled by
hardware. This allows the software to reset the SELFREFRESH bit to
"disabled", and then automatically after the fetch of the first frame the
hardware switches back SELFREFRESH bit to "enabled". The SELFREFRESH must be
disabled during at least one frame in order to capture the data, so software
must reset the bit to 0 every time the data in the DMA buffer needs to be
updated. The hardware reads the data inside the DMA buffer without accessing
the interconnect and system memory during the frame, then modifies the
SELFREFRESH bit to reflect the current state of the self-refresh mode by
setting the bit to 0x1.