SPRUIM2J May 2020 – May 2026 AM2431 , AM2432 , AM2434 , AM6411 , AM6412 , AM6421 , AM6422 , AM6441 , AM6442
Refer to Section 4.4.1 section for more information about all SPI boot modes.
OSPI Configuration Fields table shows configuration pins assignment to functions when boot mode is the Octal SPI. The BOOTMODE pin corresponding to the Iclk field determines the setting for LOOPCLK_SEL bit field in CTRLMMR_OSPI0_CLKSEL register
| BOOTMODE Pins | Field | Value | Description |
|---|---|---|---|
| 8 | Iclk | 0 | Iclock source external |
| 1 | Iclock source internal (pad loopback) | ||
| 7 | Csel | 0 | Boot Flash is on CS 0 |
| 1 | Boot Flash is on CS 1 |
OSPI Pin Usage table summarizes the OSPI pin configuration done by ROM code for OSPI boot device.
| Device Pin | Module Signal | Pull Enable | Pull Direction | Driver Index | Rx En/Dis | Tx En/Dis | Pinmux Sel |
|---|---|---|---|---|---|---|---|
| OSPI0_CLK | OSPI0_CLK | Disable | Up | 0 | Disable | Enable | 0 |
| OSPI0_LBCLKO | OSPI0_LBCLKO | Disable | Up | 0 | Enable | Enable | 0 |
| OSPI0_DQS | OSPI0_DQS | Disable | Up | 0 | Enable | Disable | 0 |
| OSPI0_D0 | OSPI0_D0 | Enable | Up | 0 | Enable | Enable | 0 |
| OSPI0_D1 | OSPI0_D1 | Enable | Up | 0 | Enable | Enable | 0 |
| OSPI0_D2 | OSPI0_D2 | Enable | Up | 0 | Enable | Enable | 0 |
| OSPI0_D3 | OSPI0_D3 | Enable | Up | 0 | Enable | Enable | 0 |
| OSPI0_D4 | OSPI0_D4 | Enable | Up | 0 | Enable | Enable | 0 |
| OSPI0_D5 | OSPI0_D5 | Enable | Up | 0 | Enable | Enable | 0 |
| OSPI0_D6 | OSPI0_D6 | Enable | Up | 0 | Enable | Enable | 0 |
| OSPI0_D7 | OSPI0_D7 | Enable | Up | 0 | Enable | Enable | 0 |
| OSPI0_CSn0(1) | OSPI0_CSn0 | Enable | Up | 0 | Disable | Enable | 0 |
| OSPI0_CSn1(1) | OSPI0_CSn1 | Enable | Up | 0 | Disable | Enable | 0 |