SPRUIM2J May 2020 – May 2026 AM2431 , AM2432 , AM2434 , AM6411 , AM6412 , AM6421 , AM6422 , AM6441 , AM6442
Register Description: This register is used to control system level functionality
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| Instance Name | Physical Address |
|---|---|
| DEBUGSS_WRAP0_pwrap_cfg_1 | 7400 023F0h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED | |||||||
| R | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED | DBGCON_WE | DBGCON | |||||
| R | R/W | R/W | |||||
| 0h | 0h | 0h | |||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| UNNAT_RESET | RST_OCCURED | SYSTEM_STAT | RSV12_BIT | GLOB_EXEC_TRIG | CLR_EX_FLAGS | GLOB_EXEC_MSK | IN_RESET_RLS_WIR |
| R | R/W | R | R | R | R/W | R/W | R/W |
| 0h | 0h | 0h | 0h | 0h | 0h | 0h | 0h |
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| WIR_REQ | BLK_SYS_RST | RESERVED0 | DEV_TYPE | SYS_RST_REQ | |||
| R/W | R/W | R | R | R/W | |||
| 0h | 0h | 0h | 0h | 0h | |||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:21 | RESERVED | R | 0h | Reserved, returns 0 |
| 20 | DBGCON_WE | R/W | 0h | This bit must be high to write to the debug connect field |
| 19:16 | DBGCON | R/W | 0h | The system debugger must write a value of 0x9 to be connected and access the debug logic |
| 15 | UNNAT_RESET | R | 0h | Unnatural Reset Device reset state is being affected by debug logic |
| 14 | RST_OCCURED | R/W | 0h | Sticky bit indicating a reset has occured Write 1 to clear this bit |
| 13 | SYSTEM_STAT | R | 0h | System Status input, application specificall |
| 12 | RSV12_BIT | R | 0h | Reserved, read returns 0 |
| 11 | GLOB_EXEC_TRIG | R | 0h | |
| 10 | CLR_EX_FLAGS | R/W | 0h | Clear all run flags |
| 9 | GLOB_EXEC_MSK | R/W | 0h | Global Execute Mask |
| 8 | IN_RESET_RLS_WIR | R/W | 0h | Writing a 1 releases the global WIR When read this returns the in reset status |
| 7 | WIR_REQ | R/W | 0h | Wait In Reset Request |
| 6 | BLK_SYS_RST | R/W | 0h | Block System Reset |
| 5:4 | RESERVED0 | R | 0h | Reserved0, returns 0 |
| 3:1 | DEV_TYPE | R | 0h | Device Type tieoff value Test, emulator, secure, etc |
| 0 | SYS_RST_REQ | R/W | 0h | System Reset Request This bit will be reset once reset occurs |