The following apply to all or multiple boot modes that are SPI
related.
- Octal SPI flash memories support various protocols, however,
the OSPI boot mode of the device will only support a specific protocol defined in OSPI Bootloader Operation.
If the flash memory is complaint with JEDEC xSPI standards JESD251 and JESD216D, then xSPI boot mode is
additionally supported. Refer to the xSPI boot mode description for further details.
- When using a OSPI\xSPI\QSPI\SPI
flash device greater than 128Mb which supports 3-byte and 4-byte addressing
modes, a flash device package with a RESET signal must be used. The reason is
that the ROM only uses 3-byte addressing mode (address is 24 bits). To address
the full memory address range, software will typically switch to 4-byte
addressing mode. If a reset to the processor occurs (for example, due to a warm
reset), the ROM will execute expecting 3-byte addressing mode, but the flash
will have been left in 4-byte addressing mode. For the flash device to return to
3-byte addressing mode, it must be reset using this signal. This typically can
be achieved by using the RESET signal on the flash memory device. The ROM does
not issue a software reset command.