SPRUIM2J May 2020 – May 2026 AM2431 , AM2432 , AM2434 , AM6411 , AM6412 , AM6421 , AM6422 , AM6441 , AM6442
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| Instance Name | Physical Address |
|---|---|
| MCU_CTRL_MMR0 | 0451 A190h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| VDD_CORE_GLDTC_CTRL_PWDB_PROXY | VDD_CORE_GLDTC_CTRL_RSTB_PROXY | RESERVED | |||||
| R/W | R/W | NONE | |||||
| 0h | 0h | 0h | |||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED | VDD_CORE_GLDTC_CTRL_LP_FILTER_SEL_PROXY | ||||||
| NONE | R/W | ||||||
| 0h | X | ||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED | VDD_CORE_GLDTC_CTRL_THRESH_HI_SEL_PROXY | ||||||
| NONE | R/W | ||||||
| 0h | X | ||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED | VDD_CORE_GLDTC_CTRL_THRESH_LO_SEL_PROXY | ||||||
| NONE | R/W | ||||||
| 0h | X | ||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31 | VDD_CORE_GLDTC_CTRL_PWDB_PROXY | R/W | 0h | Power down - active low. Reset Source: mcu_chip1_rst_n |
| 30 | VDD_CORE_GLDTC_CTRL_RSTB_PROXY | R/W | 0h | Reset - active low. To ensure proper operation, rstb must be not be de-asserted for at least 100 ns after power-up (pwdb de-asserted). Additionally, rstb must be toggled low at least 200 ns after any change in threshold or low-pass filter settings to prevent abnormal trigger events. Reset Source: mcu_chip1_rst_n |
| 29:19 | RESERVED | NONE | 0h | Reserved |
| 18:16 | VDD_CORE_GLDTC_CTRL_LP_FILTER_SEL_PROXY | R/W | X | Selects the glitch detect low-pass filter bandwidth Reset Source: mcu_chip1_rst_n |
| 15:14 | RESERVED | NONE | 0h | Reserved |
| 13:8 | VDD_CORE_GLDTC_CTRL_THRESH_HI_SEL_PROXY | R/W | X | Selects the high voltage glitch threshold as a percentage of the monitored voltage Reset Source: mcu_chip1_rst_n |
| 7:6 | RESERVED | NONE | 0h | Reserved |
| 5:0 | VDD_CORE_GLDTC_CTRL_THRESH_LO_SEL_PROXY | R/W | X | Selects the low voltage glitch threshold as a percentage of the monitored voltage Reset Source: mcu_chip1_rst_n |