SPRUIM2J May 2020 – May 2026 AM2431 , AM2432 , AM2434 , AM6411 , AM6412 , AM6421 , AM6422 , AM6441 , AM6442
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| Instance Name | Physical Address |
|---|---|
| DDR16SS0 | 0F30 A17Ch |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED | PI_UPDATE_ERROR_STATUS | ||||||
| NONE | R | ||||||
| 0h | 0h | ||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| PI_TDFI_CTRLUPD_MIN | |||||||
| R/W | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| PI_TDFI_CTRLUPD_MIN | |||||||
| R/W | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED | PI_CTRLUPD_REQ_PER_AREF_EN | ||||||
| NONE | R/W | ||||||
| 0h | 0h | ||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:26 | RESERVED | NONE | 0h | Reserved |
| 25:24 | PI_UPDATE_ERROR_STATUS | R | 0h | Identifies the source of any DFI PI-initiated update errors. Value of 1 indicates a timing violation of the associated timing parameter. Bit 1-0: ctrlupd_max_error, ctrlupd_interval_error. Bit 6-2: reserved. READ-ONLY Reset Source: ctl_amod_g_rst_n |
| 23:8 | PI_TDFI_CTRLUPD_MIN | R/W | 0h | Reports the DFI tCTRLUPD_MIN timing parameter [in DFI clocks], the minimum cycles that dfi_ctrlupd_req must be asserted. Reset Source: ctl_amod_g_rst_n |
| 7:1 | RESERVED | NONE | 0h | Reserved |
| 0 | PI_CTRLUPD_REQ_PER_AREF_EN | R/W | 0h | Enable an automatic PI initiated update [dfi_ctrlupd_req] after every refresh. Set to 1 to enable. Reset Source: ctl_amod_g_rst_n |